[PATCH v3 01/15] dt-bindings: clock: mediatek: add missing required #reset-cells

Matthias Brugger matthias.bgg at gmail.com
Sun Mar 18 13:34:49 PDT 2018



On 03/16/2018 09:36 PM, Stephen Boyd wrote:
> Quoting sean.wang at mediatek.com (2018-02-17 11:54:36)
>> From: Sean Wang <sean.wang at mediatek.com>
>>
>> All ethsys, pciesys and ssusbsys internally include reset controller, so
>> explicitly add back these missing cell definitions to related bindings
>> and examples.
>>
>> Signed-off-by: Sean Wang <sean.wang at mediatek.com>
>> Cc: Rob Herring <robh at kernel.org>
>> Cc: Michael Turquette <mturquette at baylibre.com>
>> Cc: Stephen Boyd <sboyd at codeaurora.org>
>> Cc: linux-clk at vger.kernel.org
>> Reviewed-by: Rob Herring <robh at kernel.org>
>> ---
> 
> Acked-by: Stephen Boyd <sboyd at kernel.org>
> 

added to v4.16-next/dts64
Thanks!



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