[PATCH 0/2] MT8173 clock changes for DRM

Philipp Zabel p.zabel at pengutronix.de
Thu Nov 19 07:59:46 PST 2015


Hi,

I have sent these two as part of the MT8173 DRM/KMS driver patch series [1],
but not yet to the clock list. I'd be happy to get some review and
suggestions on how to best merge them, given the dependency of the DRM/KMS
driver on these changes.

[1] http://www.spinics.net/lists/dri-devel/msg94500.html

best regards
Philipp

Philipp Zabel (2):
  clk: mediatek: make dpi0_sel and hdmi_sel not propagate rate changes
  clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

 drivers/clk/mediatek/clk-mt8173.c      | 9 +++++++--
 drivers/clk/mediatek/clk-mtk.h         | 7 +++++--
 include/dt-bindings/clock/mt8173-clk.h | 3 ++-
 3 files changed, 14 insertions(+), 5 deletions(-)

-- 
2.6.2




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