[PATCH v5 06/10] clk: mediatek: mt8173: Fix enabling of critical clocks

James Liao jamesjj.liao at mediatek.com
Wed Jul 29 19:23:33 PDT 2015

Hi Stephen,

On Wed, 2015-07-29 at 17:27 -0700, Stephen Boyd wrote:
> On 07/29, James Liao wrote:
> > From: Sascha Hauer <s.hauer at pengutronix.de>
> > 
> > On the MT8173 the clocks are provided by different units. To enable
> > the critical clocks we must be sure that all parent clocks are already
> > registered, otherwise the parents of the critical clocks end up being
> > unused and get disabled later.
> > 
> > On MT8173, for example, it is the CLK_TOP clocks that have CLK_APMIXED
> > PLLs as their parents, so we cannot enable the CLK_TOP critical clocks
> > until the CLK_APMIXED clocks have all been registered.
> > 
> > To find a place where all parents are registered we try each time
> > after we've registered some clocks if all known providers are present
> > now and only then we enable the critical clocks.
> > 
> > Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> > Signed-off-by: James Liao <jamesjj.liao at mediatek.com>
> > ---
> Please move up to v4.2-rc2 so that this patch can be dropped. I
> already applied this and sent it off to Linus so it's in -rc2.

OK. I'll rebase to v4.2-rc2 in next patchset.

Best regards,


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