[PATCH v3 05/17] i3c: renesas: Reset the controller on resume
sashiko-bot at kernel.org
sashiko-bot at kernel.org
Mon Jun 8 13:29:20 PDT 2026
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Hardware resets (`tresetn` and `presetn`) are deasserted before clocks are enabled during resume, violating standard power-on sequences and contradicting the probe logic.
--
commit e6c25e39ab123d0505dce6bd4d588e973c083ab8
Author: Claudiu Beznea <claudiu.beznea.uj at bp.renesas.com>
i3c: renesas: Reset the controller on resume
This commit reorders the software reset (renesas_i3c_reset) during
resume to happen after the clocks are enabled. It also updates the
reset function to use an atomic polling mechanism since the resume callback
runs during the noirq phase.
Cc: stable at vger.kernel.org
> diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
> index 76a4831098c94..7ef317b2ba39a 100644
> --- a/drivers/i3c/master/renesas-i3c.c
> +++ b/drivers/i3c/master/renesas-i3c.c
[ ... ]
> @@ -1483,6 +1483,10 @@ static int renesas_i3c_resume_noirq(struct device *dev)
> if (ret)
> goto err_presetn;
>
> + ret = renesas_i3c_reset(i3c);
> + if (ret)
> + goto err_clks_disable;
> +
[Severity: High]
This is a pre-existing issue, but the commit message states it aims to
"follow the same sequence as in probe", where clocks are enabled before
resets are deasserted.
While this patch moves the software reset to happen after the clocks are
enabled, the hardware resets (tresetn and presetn) are still deasserted
before clk_bulk_enable() is called in renesas_i3c_resume_noirq():
drivers/i3c/master/renesas-i3c.c:renesas_i3c_resume_noirq() {
...
ret = reset_control_deassert(i3c->tresetn);
if (ret)
return ret;
ret = reset_control_deassert(i3c->presetn);
if (ret)
goto err_tresetn;
ret = clk_bulk_enable(i3c->num_clks, i3c->clks);
...
}
Should the reset_control_deassert() calls also be moved to happen after
clk_bulk_enable() to fully align with the probe sequence and avoid releasing
synchronous hardware resets while the peripheral clock is disabled?
> /* Re-store I3C registers value. */
> renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR);
> renesas_writel(i3c->regs, EXTBR, i3c->extbr);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260608201543.804902-1-claudiu.beznea@kernel.org?part=5
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