[PATCH 12/12] i3c: mipi-i3c-hci: Fallback to software reset when bus disable fails

[Frank Li]

On Fri, Feb 27, 2026 at 04:11:49PM +0200, Adrian Hunter wrote:
> Disruption of the MIPI I3C HCI controller’s internal state can cause
> i3c_hci_bus_disable() to fail when attempting to shut down the bus.
>
> In the code paths where bus disable is invoked - bus clean-up and runtime
> suspend - the controller does not need to remain operational afterward, so
> a full controller reset is a safe recovery mechanism.
>
> Add a fallback to issue a software reset when disabling the bus fails.
> This ensures the bus is reliably halted even if the controller’s state
> machine is stuck or unresponsive.
>
> The fallback is used both during bus clean-up and in the runtime suspend
> path.  In the latter case, ensure interrupts are quiesced after reset.
>
> Fixes: 9ad9a52cce282 ("i3c/master: introduce the mipi-i3c-hci driver")
> Cc: stable at vger.kernel.org
> Signed-off-by: Adrian Hunter <adrian.hunter at intel.com>
> ---
Reviewed-by: Frank Li <Frank.Li at nxp.com>
>  drivers/i3c/master/mipi-i3c-hci/core.c | 65 ++++++++++++++------------
>  1 file changed, 35 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index 2909e3d35d8b..648ce87e3b7e 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -182,6 +182,34 @@ static int i3c_hci_bus_disable(struct i3c_hci *hci)
>  	return ret;
>  }
>
> +static int i3c_hci_software_reset(struct i3c_hci *hci)
> +{
> +	u32 regval;
> +	int ret;
> +
> +	/*
> +	 * SOFT_RST must be clear before we write to it.
> +	 * Then we must wait until it clears again.
> +	 */
> +	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> +				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
> +	if (ret) {
> +		dev_err(&hci->master.dev, "%s: Software reset stuck\n", __func__);
> +		return ret;
> +	}
> +
> +	reg_write(RESET_CONTROL, SOFT_RST);
> +
> +	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> +				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
> +	if (ret) {
> +		dev_err(&hci->master.dev, "%s: Software reset failed\n", __func__);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
>  void i3c_hci_sync_irq_inactive(struct i3c_hci *hci)
>  {
>  	struct platform_device *pdev = to_platform_device(hci->master.dev.parent);
> @@ -198,7 +226,8 @@ static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
>  {
>  	struct i3c_hci *hci = to_i3c_hci(m);
>
> -	i3c_hci_bus_disable(hci);
> +	if (i3c_hci_bus_disable(hci))
> +		i3c_hci_software_reset(hci);
>  	hci->io->cleanup(hci);
>  }
>
> @@ -628,34 +657,6 @@ static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id)
>  	return result;
>  }
>
> -static int i3c_hci_software_reset(struct i3c_hci *hci)
> -{
> -	u32 regval;
> -	int ret;
> -
> -	/*
> -	 * SOFT_RST must be clear before we write to it.
> -	 * Then we must wait until it clears again.
> -	 */
> -	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> -				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
> -	if (ret) {
> -		dev_err(&hci->master.dev, "%s: Software reset stuck\n", __func__);
> -		return ret;
> -	}
> -
> -	reg_write(RESET_CONTROL, SOFT_RST);
> -
> -	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
> -				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
> -	if (ret) {
> -		dev_err(&hci->master.dev, "%s: Software reset failed\n", __func__);
> -		return ret;
> -	}
> -
> -	return 0;
> -}
> -
>  static inline bool is_version_1_1_or_newer(struct i3c_hci *hci)
>  {
>  	return hci->version_major > 1 || (hci->version_major == 1 && hci->version_minor > 0);
> @@ -766,8 +767,12 @@ static int i3c_hci_runtime_suspend(struct device *dev)
>  	int ret;
>
>  	ret = i3c_hci_bus_disable(hci);
> -	if (ret)
> +	if (ret) {
> +		/* Fall back to software reset to disable the bus */
> +		ret = i3c_hci_software_reset(hci);
> +		i3c_hci_sync_irq_inactive(hci);
>  		return ret;
> +	}
>
>  	hci->io->suspend(hci);
>
> --
> 2.51.0
>
>
> --
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