[PATCH V2 12/13] i3c: mipi-i3c-hci-pci: Add LTR support for Intel controllers

[Frank Li]

On Fri, Nov 14, 2025 at 08:13:55PM +0200, Adrian Hunter wrote:
> Add support for Latency Tolerance Reporting (LTR) for Intel controllers.
>
> Implement PM ->set_latency_tolerance() callback to set LTR register values.
> Also expose LTR register values via debugfs.
>
> Signed-off-by: Adrian Hunter <adrian.hunter at intel.com>
> ---
>
>
> Changes in V2:
>
> 	Make use of FIELD_PREP()
> 	Improve handling of values that exceed the maximum
>
>
>  .../master/mipi-i3c-hci/mipi-i3c-hci-pci.c    | 125 ++++++++++++++++++
>  1 file changed, 125 insertions(+)
>
...
> +static void intel_ltr_expose(struct device *dev)
> +{
> +	dev->power.set_latency_tolerance = intel_ltr_set;
> +	dev_pm_qos_expose_latency_tolerance(dev);
> +}
> +
> +static void intel_ltr_hide(struct device *dev)
> +{
> +	dev_pm_qos_hide_latency_tolerance(dev);
> +	dev->power.set_latency_tolerance = NULL;
> +}
> +
> +static struct dentry *intel_actualize_debugfs_root(bool add)
> +{
> +	static struct dentry *debugfs_root;
> +	static DEFINE_MUTEX(lock);
> +	static int ref_cnt;
> +
> +	guard(mutex)(&lock);
> +
> +	ref_cnt += add ? 1 : -1;
> +
> +	if (ref_cnt) {
> +		if (IS_ERR_OR_NULL(debugfs_root))
> +			debugfs_root = debugfs_create_dir("intel_i3c", NULL);

I think it'd better to create common "i3c" debugfs root. So your device
use debugfs_create_dir(dev_name(&hci->pci->dev), ...) under this common
root.

Frank

...

> +
>  static const struct mipi_i3c_hci_pci_info intel_info = {
>  	.init = intel_i3c_init,
> +	.exit = intel_exit,
>  };
>
>  static int mipi_i3c_hci_pci_probe(struct pci_dev *pci,
> --
> 2.51.0
>
>
> --
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