[PATCH V2 01/13] i3c: mipi-i3c-hci-pci: Set 64-bit DMA mask for Intel controllers

[Frank Li]

On Fri, Nov 14, 2025 at 08:13:44PM +0200, Adrian Hunter wrote:
> All Intel controllers support 64-bit DMA.  Set the DMA mask accordingly.
>
> This is needed only if there is no IOMMU configured, which is not
> recommended, but possible.

I think DMA mask is not related IOMMU at all, It indicates your DMA's
address widith. So this sentence is reduntant and confused. Suggest remove
it if no specific reason.

Frank

>
> Signed-off-by: Adrian Hunter <adrian.hunter at intel.com>
> ---
>
>
> Changes in V2:
>
> 	No need to check error from dma_set_mask_and_coherent() with a
> 	64-bit mask
>
>  drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
> index dd4484eff2f0..3cd15ca7d391 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
> @@ -36,6 +36,8 @@ static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci)
>  	if (!priv)
>  		return -ENOMEM;
>
> +	dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64));
> +
>  	/* Assert reset, wait for completion and release reset */
>  	writel(0, priv + INTEL_PRIV_RESETS);
>  	timeout = jiffies + msecs_to_jiffies(10);
> --
> 2.51.0
>
>
> --
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