[PATCH v3 5/5] i3c: dw: Add quirk to address OD/PP timing issue on AMD platform

[Jarkko Nikula]

On 11/8/24 9:33 AM, Shyam Sundar S K wrote:
> The AMD Legacy I3C is having a problem with its IP, specifically with the
> push-pull and open-drain pull-up registers. These registers need to be
> manually programmed for every CCC submission to align with the duty cycle.
> Therefore, add a quirk to address this issue.
> 
> Co-developed-by: Sanket Goswami <Sanket.Goswami at amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami at amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k at amd.com>
> ---
>   drivers/i3c/master/dw-i3c-master.c | 29 ++++++++++++++++++++++++++++-
>   drivers/i3c/master/dw-i3c-master.h |  1 +
>   2 files changed, 29 insertions(+), 1 deletion(-)
> 
Reviewed-by: Jarkko Nikula <jarkko.nikula at linux.intel.com>