[PATCH v3 2/4] dt-bindings: i3c: Describe Silvaco master binding
Rob Herring
robh at kernel.org
Mon Jan 11 15:08:21 EST 2021
On Mon, Dec 28, 2020 at 05:11:05PM +0100, Miquel Raynal wrote:
> Silvaco provide a dual-role I3C master.
>
> Description is rather simple: it needs a register mapping, three
> clocks and an interrupt.
>
> Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
> ---
> .../bindings/i3c/silvaco,i3c-master.yaml | 63 +++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
>
> diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> new file mode 100644
> index 000000000000..509de48455b0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Silvaco I3C master
> +
> +maintainers:
> + - Conor Culhane <conor.culhane at silvaco.com>
> +
> +properties:
> + compatible:
> + const: silvaco,i3c-master
Kind of generic. Only 1 version?
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: pclk, the system clock
> + - description: fast_clk, for the bus
> + - description: slow_clk, for other events
The names of the clocks go...
> +
> + clock-names:
> + minItems: 3
> + maxItems: 3
here.
> +
> + resets:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
This 2 should be defined by a bus binding. Care to convert i3c.txt?
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clock-names
> + - clocks
> + - "#address-cells"
> + - "#size-cells"
> +
> +additionalProperties: false
No, don't you need child nodes?
> +
> +examples:
> + - |
> + i3c-master at a0000000 {
> + compatible = "silvaco,i3c-master";
> + clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>;
> + clock-names = "pclk", "fast_clk", "slow_clk";
> + interrupt-parent = <&gic>;
> + interrupts = <0 89 4>;
> + reg = <0xa0000000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> --
> 2.20.1
>
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