[PATCH v2 1/2] dt-bindings: i3c: MIPI I3C Host Controller Interface

[Nicolas Pitre]

On Tue, 25 Aug 2020, Rob Herring wrote:

> On Tue, Aug 18, 2020 at 11:17:22PM -0400, Nicolas Pitre wrote:
> > From: Nicolas Pitre <npitre at baylibre.com>
> > 
> > The MIPI I3C HCI (Host Controller Interface) specification defines
> > a common software driver interface to support compliant MIPI I3C
> > host controller hardware implementations from multiple vendors.
> > 
> > Signed-off-by: Nicolas Pitre <npitre at baylibre.com>
> > ---
> >  .../devicetree/bindings/i3c/mipi-i3c-hci.yaml | 41 +++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml
> > new file mode 100644
> > index 0000000000..8fc18ea922
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml
> > @@ -0,0 +1,41 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: MIPI I3C HCI Device Tree Bindings
> > +
> > +maintainers:
> > +  - Nicolas Pitre <npitre at baylibre.com>
> > +
> > +description: |
> > +  MIPI I3C Host Controller Interface
> > +
> > +  The MIPI I3C HCI (Host Controller Interface) specification defines
> > +  a common software driver interface to support compliant MIPI I3C
> > +  host controller hardware implementations from multiple vendors.
> > +
> > +  For details, please see:
> > +  https://www.mipi.org/specifications/i3c-hci
> > +
> > +properties:
> > +  compatible:
> > +    const: mipi-i3c-hci
> 
> What about my comments on v1? Pasted again:

Oops, sorry, I missed them.

> A register interface (or protocol) spec is never complete enough to
> capture all the details about a specific h/w implementation. One just
> has to go look at AHCI, EHCI, OHCI, XHCI, UFS, 8250, etc. bindings.
> Let's not start with pretending that here. Fine for this to be a
> fallback, but it must have a compatible for a specific implementation.

You might have to indulge me a bit as I don't 
understand what you're asking.

Currently there are very few implementations. One of them lives in an 
FPGA and the example below is actually the DT entry I use for it. I'm 
guessing specific vendor implementations will have their own tweaks 
eventually, such as clock sources and whatnot. But that is outside of 
the spec (actually the spec defines a register area for eventual vendor 
specific usage). But I have no visibility into that and of course the 
code has no provision for that yet either.

So I imagine there will be something like this in dts files eventually:

	compatibvle = "intel,foobar_soc_i3c_hci", "mipi-i3c-hci";

Is that what you mean?

> Also, which version of the spec does this compatible correspond to?

All of them.

> Or are there not HCI differences in the spec versions you mention in 
> the cover letter?

The hardware is self advertising per the spec. So there is no need to 
carry such distinction in the DT compatible. Even vendor extensions are 
tagged with MIPI vendor IDs in the hardware directly.

> > +  reg:
> > +    maxItems: 1
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +
> > +examples:
> > +  - |
> > +    mipi_i3c_hci at a0000000 {
> 
> i3c at a0000000

OK.


Nicolas