<font face="Default Sans Serif,Verdana,Arial,Helvetica,sans-serif" size="2"> Hi Martin,<br><font face="Courier New,Courier,monospace" size="3">Are you getting any extra output (that you didn't have before patching<br>the serial driver)?<br>Ie it could be that you were always getting this lockup just at the<br>wrong baud rate so you couldn't see it.<br><br>Before applying this patch i was getting Freeing init memory and after some time some junk characters.<br></font><br>I applied your patch.<br><br>With this i am getting error like this as before.<br>&lt;5&gt;RAMDISK: Compressed image found at block 0<br><br>VFS: Mounted root (ext2 filesystem).<br>Freeing init memory: 128K<br>&lt;6&gt;@HACK@ ignoring imx_setup_ufcr 0<br>@HACK@ ignoring imx_setup_ufcr 0<br>&lt;3&gt;BUG: soft lockup - CPU#0 stuck for 61s! [swapper:1]<br>BUG: soft lockup - CPU#0 stuck for 61s! [swapper:1]<br>Modules linked in:Modules linked in:<br><br><br><br>Pid: 1, comm:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; swapper<br>Pid: 1, comm:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; swapper<br>CPU: 0&nbsp;&nbsp;&nbsp; Not tainted&nbsp; (2.6.27 #19)<br>CPU: 0&nbsp;&nbsp;&nbsp; Not tainted&nbsp; (2.6.27 #19)<br>PC is at __do_softirq+0x48/0xd4<br>PC is at __do_softirq+0x48/0xd4<br>LR is at irq_exit+0x4c/0x84<br>LR is at irq_exit+0x4c/0x84<br>pc : [&lt;c004cb8c&gt;]&nbsp;&nbsp;&nbsp; lr : [&lt;c004cefc&gt;]&nbsp;&nbsp;&nbsp; psr: 20000013<br>sp : c381dc90&nbsp; ip : c381dcb0&nbsp; fp : c381dcac<br>pc : [&lt;c004cb8c&gt;]&nbsp;&nbsp;&nbsp; lr : [&lt;c004cefc&gt;]&nbsp;&nbsp;&nbsp; psr: 20000013<br>sp : c381dc90&nbsp; ip : c381dcb0&nbsp; fp : c381dcac<br>r10: c3bd0440&nbsp; r9 : 00000000&nbsp; r8 : 00000014<br>r10: c3bd0440&nbsp; r9 : 00000000&nbsp; r8 : 00000014<br>r7 : 00000000&nbsp; r6 : 0000000a&nbsp; r5 : c0433040&nbsp; r4 : 00000102<br>r7 : 00000000&nbsp; r6 : 0000000a&nbsp; r5 : c0433040&nbsp; r4 : 00000102<br>r3 : 20000013&nbsp; r2 : c046db40&nbsp; r1 : c381c000&nbsp; r0 : 00000014<br>r3 : 20000013&nbsp; r2 : c046db40&nbsp; r1 : c381c000&nbsp; r0 : 00000014<br>Flags: nzCv&nbsp; IRQs on&nbsp; FIQs on&nbsp; Mode SVC_32&nbsp; ISA ARM&nbsp; Segment kernel<br>Flags: nzCv&nbsp; IRQs on&nbsp; FIQs on&nbsp; Mode SVC_32&nbsp; ISA ARM&nbsp; Segment kernel<br>Control: 0005317f&nbsp; Table: a0004000&nbsp; DAC: 00000017<br>Control: 0005317f&nbsp; Table: a0004000&nbsp; DAC: 00000017<br>[&lt;c0029d40&gt;] [&lt;c0029d40&gt;] (show_regs+0x0/0x50) (show_regs+0x0/0x50) from [&lt;c0078450&gt;] from [&lt;c0078450&gt;] (softlockup_tick+0x108/0x158)<br>(softlockup_tick+0x108/0x158)<br>&nbsp;r4:026258ea r4:026258ea<br><br>[&lt;c0078348&gt;] [&lt;c0078348&gt;] (softlockup_tick+0x0/0x158) (softlockup_tick+0x0/0x158) from [&lt;c0051604&gt;] from [&lt;c0051604&gt;] (run_local_timers+0x1c/0x20)<br>(run_local_timers+0x1c/0x20)<br>[&lt;c00515e8&gt;] [&lt;c00515e8&gt;] (run_local_timers+0x0/0x20) (run_local_timers+0x0/0x20) from [&lt;c0051a90&gt;] from [&lt;c0051a90&gt;] (update_process_times+0x2c/0x58)<br>(update_process_times+0x2c/0x58)<br>[&lt;c0051a64&gt;] [&lt;c0051a64&gt;] (update_process_times+0x0/0x58) (update_process_times+0x0/0x58) from [&lt;c0065098&gt;] from [&lt;c0065098&gt;] (tick_sched_timer+0x8c/0xd8)<br>(tick_sched_timer+0x8c/0xd8)<br>&nbsp;r5:c381dc48 r5:c381dc48 r4:c046f298 r4:c046f298<br><br>[&lt;c006500c&gt;] [&lt;c006500c&gt;] (tick_sched_timer+0x0/0xd8) (tick_sched_timer+0x0/0xd8) from [&lt;c005ebb8&gt;] from [&lt;c005ebb8&gt;] (__run_hrtimer+0x58/0xa4)<br>(__run_hrtimer+0x58/0xa4)<br>&nbsp;r7:3fbce150 r7:3fbce150 r6:c046f298 r6:c046f298 r5:c0431ee8 r5:c0431ee8 r4:c046f298 r4:c046f298<br><br>[&lt;c005eb60&gt;] [&lt;c005eb60&gt;] (__run_hrtimer+0x0/0xa4) (__run_hrtimer+0x0/0xa4) from [&lt;c005fbd8&gt;] from [&lt;c005fbd8&gt;] (hrtimer_interrupt+0x168/0x214)<br>(hrtimer_interrupt+0x168/0x214)<br>&nbsp;r5:00000043 r5:00000043 r4:00000e0d r4:00000e0d<br><br>[&lt;c005fa70&gt;] [&lt;c005fa70&gt;] (hrtimer_interrupt+0x0/0x214) (hrtimer_interrupt+0x0/0x214) from [&lt;c0033320&gt;] from [&lt;c0033320&gt;] (mxc_timer_interrupt+0x2c/0x3c)<br>(mxc_timer_interrupt+0x2c/0x3c)<br>[&lt;c00332f4&gt;] [&lt;c00332f4&gt;] (mxc_timer_interrupt+0x0/0x3c) (mxc_timer_interrupt+0x0/0x3c) from [&lt;c0078938&gt;] from [&lt;c0078938&gt;] (handle_IRQ_event+0x44/0x84)<br>(handle_IRQ_event+0x44/0x84)<br>[&lt;c00788f4&gt;] [&lt;c00788f4&gt;] (handle_IRQ_event+0x0/0x84) (handle_IRQ_event+0x0/0x84) from [&lt;c007a294&gt;] from [&lt;c007a294&gt;] (handle_level_irq+0x94/0xec)<br>(handle_level_irq+0x94/0xec)<br>&nbsp;r7:00000000 r7:00000000 r6:c381dce8 r6:c381dce8 r5:0000001a r5:0000001a r4:c0433190 r4:c0433190<br><br>[&lt;c007a200&gt;] [&lt;c007a200&gt;] (handle_level_irq+0x0/0xec) (handle_level_irq+0x0/0xec) from [&lt;c0028048&gt;] from [&lt;c0028048&gt;] (asm_do_IRQ+0x48/0x64)<br>(asm_do_IRQ+0x48/0x64)<br>&nbsp;r5:c0433190 r5:c0433190 r4:0000001a r4:0000001a<br><br>[&lt;c0028000&gt;] [&lt;c0028000&gt;] (asm_do_IRQ+0x0/0x64) (asm_do_IRQ+0x0/0x64) from [&lt;c0338c10&gt;] from [&lt;c0338c10&gt;] (__irq_svc+0x30/0x60)<br>(__irq_svc+0x30/0x60)<br>Exception stack(0xc381dc48 to 0xc381dc90)<br>Exception stack(0xc381dc48 to 0xc381dc90)<br>dc40: dc40:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 00000014 00000014 c381c000 c381c000 c046db40 c046db40 20000013 20000013 00000102 00000102 c0433040 c0433040 <br><br>dc60: dc60: 0000000a 0000000a 00000000 00000000 00000014 00000014 00000000 00000000 c3bd0440 c3bd0440 c381dcac c381dcac c381dcb0 c381dcb0 c381dc90 c381dc90 <br><br>dc80: dc80: c004cefc c004cefc c004cb8c c004cb8c 20000013 20000013 ffffffff ffffffff&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br><br>&nbsp;r6:001a0000 r6:001a0000 r5:f4040000 r5:f4040000 r4:ffffffff r4:ffffffff<br><br>[&lt;c004cb44&gt;] [&lt;c004cb44&gt;] (__do_softirq+0x0/0xd4) (__do_softirq+0x0/0xd4) from [&lt;c004cefc&gt;] from [&lt;c004cefc&gt;] (irq_exit+0x4c/0x84)<br>(irq_exit+0x4c/0x84)<br>&nbsp;r6:00000000 r6:00000000 r5:c0433040 r5:c0433040 r4:c381c000 r4:c381c000<br><br>[&lt;c004ceb0&gt;] [&lt;c004ceb0&gt;] (irq_exit+0x0/0x84) (irq_exit+0x0/0x84) from [&lt;c002804c&gt;] from [&lt;c002804c&gt;] (asm_do_IRQ+0x4c/0x64)<br>(asm_do_IRQ+0x4c/0x64)<br>&nbsp;r4:00000014 r4:00000014<br><br>[&lt;c0028000&gt;] [&lt;c0028000&gt;] (asm_do_IRQ+0x0/0x64) (asm_do_IRQ+0x0/0x64) from [&lt;c0338c10&gt;] from [&lt;c0338c10&gt;] (__irq_svc+0x30/0x60)<br>(__irq_svc+0x30/0x60)<br>Exception stack(0xc381dce8 to 0xc381dd30)<br>Exception stack(0xc381dce8 to 0xc381dd30)<br>dce0: dce0:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 00000000 00000000 c3bd0440 c3bd0440 00000000 00000000 00000000 00000000 c0079820 c0079820 c0433040 c0433040 <br><br>dd00: dd00: 40000013 40000013 00000000 00000000 00000014 00000014 00000000 00000000 c3bd0440 c3bd0440 c381dd64 c381dd64 c381dd08 c381dd08 c381dd30 c381dd30 <br><br>dd20: dd20: c00797fc c00797fc c00791a0 c00791a0 60000013 60000013 ffffffff ffffffff&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br><br>&nbsp;r6:00140000 r6:00140000 r5:f4040000 r5:f4040000 r4:ffffffff r4:ffffffff<br><br>[&lt;c0078fa0&gt;] [&lt;c0078fa0&gt;] (setup_irq+0x0/0x28c) (setup_irq+0x0/0x28c) from [&lt;c00792f8&gt;] from [&lt;c00792f8&gt;] (request_irq+0xcc/0xf8)<br>(request_irq+0xcc/0xf8)<br>[&lt;c007922c&gt;] [&lt;c007922c&gt;] (request_irq+0x0/0xf8) (request_irq+0x0/0xf8) from [&lt;c0238c14&gt;] from [&lt;c0238c14&gt;] (imx_startup+0xbc/0x188)<br>(imx_startup+0xbc/0x188)<br>[&lt;c0238b58&gt;] [&lt;c0238b58&gt;] (imx_startup+0x0/0x188) (imx_startup+0x0/0x188) from [&lt;c02360c8&gt;] from [&lt;c02360c8&gt;] (uart_startup+0x90/0x194)<br>(uart_startup+0x90/0x194)<br>&nbsp;r5:c3ba3800 r5:c3ba3800 r4:00000000 r4:00000000<br><br>[&lt;c0236038&gt;] [&lt;c0236038&gt;] (uart_startup+0x0/0x194) (uart_startup+0x0/0x194) from [&lt;c0237ecc&gt;] from [&lt;c0237ecc&gt;] (uart_open+0x184/0x45c)<br>(uart_open+0x184/0x45c)<br>[&lt;c0237d48&gt;] [&lt;c0237d48&gt;] (uart_open+0x0/0x45c) (uart_open+0x0/0x45c) from [&lt;c02211b4&gt;] from [&lt;c02211b4&gt;] (tty_open+0x188/0x2e0)<br>(tty_open+0x188/0x2e0)<br>[&lt;c022102c&gt;] [&lt;c022102c&gt;] (tty_open+0x0/0x2e0) (tty_open+0x0/0x2e0) from [&lt;c00a9834&gt;] from [&lt;c00a9834&gt;] (chrdev_open+0x120/0x164)<br>(chrdev_open+0x120/0x164)<br>[&lt;c00a9714&gt;] [&lt;c00a9714&gt;] (chrdev_open+0x0/0x164) (chrdev_open+0x0/0x164) from [&lt;c00a4d60&gt;] from [&lt;c00a4d60&gt;] (__dentry_open+0x158/0x274)<br>(__dentry_open+0x158/0x274)<br>&nbsp;r7:c00a9714 r7:c00a9714 r6:00000000 r6:00000000 r5:c3426410 r5:c3426410 r4:c3bc7460 r4:c3bc7460<br><br>[&lt;c00a4c08&gt;] [&lt;c00a4c08&gt;] (__dentry_open+0x0/0x274) (__dentry_open+0x0/0x274) from [&lt;c00a4eb4&gt;] from [&lt;c00a4eb4&gt;] (nameidata_to_filp+0x38/0x50)<br>(nameidata_to_filp+0x38/0x50)<br>[&lt;c00a4e7c&gt;] [&lt;c00a4e7c&gt;] (nameidata_to_filp+0x0/0x50) (nameidata_to_filp+0x0/0x50) from [&lt;c00b2164&gt;] from [&lt;c00b2164&gt;] (do_filp_open+0x354/0x6e0)<br>(do_filp_open+0x354/0x6e0)<br>&nbsp;r4:00000000 r4:00000000<br><br>[&lt;c00b1e10&gt;] [&lt;c00b1e10&gt;] (do_filp_open+0x0/0x6e0) (do_filp_open+0x0/0x6e0) from [&lt;c00a4b1c&gt;] from [&lt;c00a4b1c&gt;] (do_sys_open+0x5c/0xec)<br>(do_sys_open+0x5c/0xec)<br>[&lt;c00a4ac0&gt;] [&lt;c00a4ac0&gt;] (do_sys_open+0x0/0xec) (do_sys_open+0x0/0xec) from [&lt;c00a4be4&gt;] from [&lt;c00a4be4&gt;] (sys_open+0x24/0x28)<br>(sys_open+0x24/0x28)<br>&nbsp;r8:00000000 r8:00000000 r7:00000000 r7:00000000 r6:00000000 r6:00000000 r5:c0021fd0 r5:c0021fd0 r4:c044bcf8 r4:c044bcf8<br><br>[&lt;c00a4bc0&gt;] [&lt;c00a4bc0&gt;] (sys_open+0x0/0x28) (sys_open+0x0/0x28) from [&lt;c0028444&gt;] from [&lt;c0028444&gt;] (init_post+0x30/0x104)<br>(init_post+0x30/0x104)<br>[&lt;c0028414&gt;] [&lt;c0028414&gt;] (init_post+0x0/0x104) (init_post+0x0/0x104) from [&lt;c000893c&gt;] from [&lt;c000893c&gt;] (kernel_init+0xb4/0xd8)<br>(kernel_init+0xb4/0xd8)<br>&nbsp;r4:c044bcf8 r4:c044bcf8<br><br>[&lt;c0008888&gt;] [&lt;c0008888&gt;] (kernel_init+0x0/0xd8) (kernel_init+0x0/0xd8) from [&lt;c004ab48&gt;] from [&lt;c004ab48&gt;] (do_exit+0x0/0x798)<br>(do_exit+0x0/0x798)<br>&nbsp;r5:00000000 r5:00000000 r4:00000000 r4:00000000<br><br><br>Regards,<br>Prabha<br><br><br>Prabha J.<br>Tata Consultancy Services<br>Ph:- 918067258589<br>Cell:- 99726226444<br>Mailto: prabha.j@tcs.com<br>Website: http://www.tcs.com<br>____________________________________________<br>Experience certainty.        IT Services<br>                        Business Solutions<br>                        Outsourcing<br>____________________________________________<br><br><font color="#990099">-----linux-arm-bounces@lists.infradead.org wrote: -----</font><div><blockquote style="border-left: 2px solid black; padding-right: 0px; padding-left: 5px; margin-left: 5px; margin-right: 0px;">To: Prabha J &lt;prabha.j@tcs.com&gt;, linux-arm@lists.infradead.org<br>From: Martin Fuzzey <mfuzzey@gmail.com><br>Sent by: linux-arm-bounces@lists.infradead.org<br>Date: 11/27/2009 02:35PM<br>Subject: Re: imx27 - hanging at freeing init memory -- getting some junk         characters here after on console ..<br><br><pre>Hi,<br>Please keep the list as copy.<br><br>On Thu, Nov 26, 2009 at 10:15 AM, Prabha J &lt;prabha.j@tcs.com&gt; wrote:<br>&gt; Hi,<br>&gt;<br>&gt; 1. Another idea would be to patch drivers/serial/imx.c so that<br>&gt; imx_set_termios() and imx_setup_ufcr() are NOPs; that should leave the<br>&gt; UART config as the bootloader set it - which seems to work.<br>&gt;<br>&gt; [even though the bit time is correct maybe its a word format error...]<br>&gt;<br>&gt; I am using IMX27 processor based board(From iwave Rainbow G3 board).<br>&gt; I am also facing same problem.<br>&gt; As you have suggested i commented whole imx_set_termios() as<br>&gt;<br>&gt; static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)<br>&gt; {<br>&gt; #if 0<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unsigned int val;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unsigned int ufcr_rfdiv;<br>&gt;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* set receiver / transmitter trigger level.<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; * RFDIV is set such way to satisfy requested uartclk value<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; */<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; val = TXTL &lt;&lt; 10 | RXTL;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ufcr_rfdiv = (clk_get_rate(sport-&gt;clk) + sport-&gt;port.uartclk / 2)<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; / sport-&gt;port.uartclk;<br>&gt;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; if(!ufcr_rfdiv)<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ufcr_rfdiv = 1;<br>&gt;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; if(ufcr_rfdiv &gt;= 7)<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ufcr_rfdiv = 6;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; else<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ufcr_rfdiv = 6 - ufcr_rfdiv;<br>&gt;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; val |= UFCR_RFDIV &amp; (ufcr_rfdiv &lt;&lt; 7);<br>&gt;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; writel(val, sport-&gt;port.membase + UFCR);<br>&gt;<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; return 0;<br>&gt; #endif<br>&gt; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOP();//prabha<br>&gt; }<br>&gt;<br>Not sure where NOP() comes from...<br><br>&gt; and samething for imx_setup_ufcr() function.<br>&gt;<br>&gt; After this i am getting error as shown below.<br>&gt; &lt;3&gt;BUG: soft lockup - CPU#0 stuck for 61s! [swapper:1]<br>&gt; BUG: soft lockup - CPU#0 stuck for 61s! [swapper:1]<br>&gt; Modules linked in:Modules linked in:<br>&gt;<br>&gt;<br>&gt;<br>&gt; Pid: 1, comm:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; swapper<br>&gt; Pid: 1, comm:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; swapper<br>&gt; CPU: 0&nbsp;&nbsp;&nbsp; Not tainted&nbsp; (2.6.27 #18)<br>&gt; CPU: 0&nbsp;&nbsp;&nbsp; Not tainted&nbsp; (2.6.27 #18)<br>&gt; PC is at handle_IRQ_event+0x2c/0x84<br>&gt; PC is at handle_IRQ_event+0x2c/0x84<br>&gt; LR is at handle_level_irq+0x94/0xec<br>&gt; LR is at handle_level_irq+0x94/0xec<br>&gt; pc : <c0078920>&nbsp;&nbsp;&nbsp; lr : <c007a294>&nbsp;&nbsp;&nbsp; psr: 40000013<br>&gt; sp : c381dbf0&nbsp; ip : c381dc10&nbsp; fp : c381dc0c<br>&gt; pc : <c0078920>&nbsp;&nbsp;&nbsp; lr : <c007a294>&nbsp;&nbsp;&nbsp; psr: 40000013<br>&gt; sp : c381dbf0&nbsp; ip : c381dc10&nbsp; fp : c381dc0c<br>&gt; r10: c3bd22e0&nbsp; r9 : 00000000&nbsp; r8 : 00000014<br>&gt; r10: c3bd22e0&nbsp; r9 : 00000000&nbsp; r8 : 00000014<br>&gt; r7 : 00000014&nbsp; r6 : c381dce8&nbsp; r5 : 00000014&nbsp; r4 : c3bd22e0<br>&gt; r7 : 00000014&nbsp; r6 : c381dce8&nbsp; r5 : 00000014&nbsp; r4 : c3bd22e0<br>&gt; r3 : 40000013&nbsp; r2 : c044c8f8&nbsp; r1 : c3bd22e0&nbsp; r0 : 00000014<br>&gt; r3 : 40000013&nbsp; r2 : c044c8f8&nbsp; r1 : c3bd22e0&nbsp; r0 : 00000014<br>&gt; Flags: nZcv&nbsp; IRQs on&nbsp; FIQs on&nbsp; Mode SVC_32&nbsp; ISA ARM&nbsp; Segment kernel<br>&gt; Flags: nZcv&nbsp; IRQs on&nbsp; FIQs on&nbsp; Mode SVC_32&nbsp; ISA ARM&nbsp; Segment kernel<br>&gt; Control: 0005317f&nbsp; Table: a0004000&nbsp; DAC: 00000017<br>&gt; Control: 0005317f&nbsp; Table: a0004000&nbsp; DAC: 00000017<br>&gt; <c0029d40> <c0029d40> (show_regs+0x0/0x50) (show_regs+0x0/0x50) from<br>&gt; <c0078450> from <c0078450> (softlockup_tick+0x108/0x158)<br>&gt; (softlockup_tick+0x108/0x158)<br>&gt; &nbsp;r4:026258eb r4:026258eb<br>&gt;<br>&gt; <c0078348> <c0078348> (softlockup_tick+0x0/0x158)<br>&gt; (softlockup_tick+0x0/0x158) from <c0051604> from <c0051604><br>&gt; (run_local_timers+0x1c/0x20)<br>&gt; (run_local_timers+0x1c/0x20)<br>&gt; <c00515e8> <c00515e8> (run_local_timers+0x0/0x20)<br>&gt; (run_local_timers+0x0/0x20) from <c0051a90> from <c0051a90><br>&gt; (update_process_times+0x2c/0x58)<br>&gt; (update_process_times+0x2c/0x58)<br>&gt; <c0051a64> <c0051a64> (update_process_times+0x0/0x58)<br>&gt; (update_process_times+0x0/0x58) from <c0065098> from <c0065098><br>&gt; (tick_sched_timer+0x8c/0xd8)<br>&gt; (tick_sched_timer+0x8c/0xd8)<br>&gt; &nbsp;r5:c381dba8 r5:c381dba8 r4:c046f298 r4:c046f298<br>&gt;<br>&gt; <c006500c> <c006500c> (tick_sched_timer+0x0/0xd8)<br>&gt; (tick_sched_timer+0x0/0xd8) from <c005ebb8> from <c005ebb8><br>&gt; (__run_hrtimer+0x58/0xa4)<br>&gt; (__run_hrtimer+0x58/0xa4)<br>&gt; &nbsp;r7:3fbce150 r7:3fbce150 r6:c046f298 r6:c046f298 r5:c0431ee8 r5:c0431ee8<br>&gt; r4:c046f298 r4:c046f298<br>&gt;<br>&gt; <c005eb60> <c005eb60> (__run_hrtimer+0x0/0xa4) (__run_hrtimer+0x0/0xa4)<br>&gt; from <c005fbd8> from <c005fbd8> (hrtimer_interrupt+0x168/0x214)<br>&gt; (hrtimer_interrupt+0x168/0x214)<br>&gt; &nbsp;r5:00000044 r5:00000044 r4:04c4ca40 r4:04c4ca40<br>&gt;<br>&gt; <c005fa70> <c005fa70> (hrtimer_interrupt+0x0/0x214)<br>&gt; (hrtimer_interrupt+0x0/0x214) from <c0033320> from <c0033320><br>&gt; (mxc_timer_interrupt+0x2c/0x3c)<br>&gt; (mxc_timer_interrupt+0x2c/0x3c)<br>&gt; <c00332f4> <c00332f4> (mxc_timer_interrupt+0x0/0x3c)<br>&gt; (mxc_timer_interrupt+0x0/0x3c) from <c0078938> from <c0078938><br>&gt; (handle_IRQ_event+0x44/0x84)<br>&gt; (handle_IRQ_event+0x44/0x84)<br>&gt; <c00788f4> <c00788f4> (handle_IRQ_event+0x0/0x84)<br>&gt; (handle_IRQ_event+0x0/0x84) from <c007a294> from <c007a294><br>&gt; (handle_level_irq+0x94/0xec)<br>&gt; (handle_level_irq+0x94/0xec)<br>&gt; &nbsp;r7:00000014 r7:00000014 r6:c381dc48 r6:c381dc48 r5:0000001a r5:0000001a<br>&gt; r4:c0433190 r4:c0433190<br>&gt;<br>&gt; <c007a200> <c007a200> (handle_level_irq+0x0/0xec)<br>&gt; (handle_level_irq+0x0/0xec) from <c0028048> from <c0028048><br>&gt; (asm_do_IRQ+0x48/0x64)<br>&gt; (asm_do_IRQ+0x48/0x64)<br>&gt; &nbsp;r5:c0433190 r5:c0433190 r4:0000001a r4:0000001a<br>&gt;<br>&gt; <c0028000> <c0028000> (asm_do_IRQ+0x0/0x64) (asm_do_IRQ+0x0/0x64) from<br>&gt; <c0338bb0> from <c0338bb0> (__irq_svc+0x30/0x60)<br>&gt; (__irq_svc+0x30/0x60)<br>&gt; Exception stack(0xc381dba8 to 0xc381dbf0)<br>&gt; Exception stack(0xc381dba8 to 0xc381dbf0)<br>&gt; dba0: dba0:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 00000014 00000014 c3bd22e0<br>&gt; c3bd22e0 c044c8f8 c044c8f8 40000013 40000013 c3bd22e0 c3bd22e0 00000014<br>&gt; 00000014<br>&gt;<br>&gt; dbc0: dbc0: c381dce8 c381dce8 00000014 00000014 00000014 00000014 00000000<br>&gt; 00000000 c3bd22e0 c3bd22e0 c381dc0c c381dc0c c381dc10 c381dc10 c381dbf0<br>&gt; c381dbf0<br>&gt;<br>&gt; dbe0: dbe0: c007a294 c007a294 c0078920 c0078920 40000013 40000013 ffffffff<br>&gt; ffffffff<br>&gt;<br>&gt; &nbsp;r6:001a0000 r6:001a0000 r5:f4040000 r5:f4040000 r4:ffffffff r4:ffffffff<br>&gt;<br>&gt; <c00788f4> <c00788f4> (handle_IRQ_event+0x0/0x84)<br>&gt; (handle_IRQ_event+0x0/0x84) from <c007a294> from <c007a294><br>&gt; (handle_level_irq+0x94/0xec)<br>&gt; (handle_level_irq+0x94/0xec)<br>&gt; &nbsp;r7:00000000 r7:00000000 r6:c381dce8 r6:c381dce8 r5:00000014 r5:00000014<br>&gt; r4:c0433040 r4:c0433040<br>&gt;<br>&gt; <c007a200> <c007a200> (handle_level_irq+0x0/0xec)<br>&gt; (handle_level_irq+0x0/0xec) from <c0028048> from <c0028048><br>&gt; (asm_do_IRQ+0x48/0x64)<br>&gt; (asm_do_IRQ+0x48/0x64)<br>&gt; &nbsp;r5:c0433040 r5:c0433040 r4:00000014 r4:00000014<br>&gt;<br>&gt; <c0028000> <c0028000> (asm_do_IRQ+0x0/0x64) (asm_do_IRQ+0x0/0x64) from<br>&gt; <c0338bb0> from <c0338bb0> (__irq_svc+0x30/0x60)<br>&gt; (__irq_svc+0x30/0x60)<br>&gt; Exception stack(0xc381dc48 to 0xc381dc90)<br>&gt; Exception stack(0xc381dc48 to 0xc381dc90)<br>&gt; dc40: dc40:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0000001a 0000001a c381c000<br>&gt; c381c000 c046db40 c046db40 20000013 20000013 00000102 00000102 c0433190<br>&gt; c0433190<br>&gt;<br>&gt; dc60: dc60: 0000000a 0000000a 00000000 00000000 00000014 00000014 00000000<br>&gt; 00000000 c3bd22e0 c3bd22e0 c381dcac c381dcac c381dcb0 c381dcb0 c381dc90<br>&gt; c381dc90<br>&gt;<br>&gt; dc80: dc80: c004cefc c004cefc c004cb8c c004cb8c 20000013 20000013 ffffffff<br>&gt; ffffffff<br>&gt;<br>&gt; &nbsp;r6:00140000 r6:00140000 r5:f4040000 r5:f4040000 r4:ffffffff r4:ffffffff<br>&gt;<br>&gt; <c004cb44> <c004cb44> (__do_softirq+0x0/0xd4) (__do_softirq+0x0/0xd4)<br>&gt; from <c004cefc> from <c004cefc> (irq_exit+0x4c/0x84)<br>&gt; (irq_exit+0x4c/0x84)<br>&gt; &nbsp;r6:00000000 r6:00000000 r5:c0433190 r5:c0433190 r4:c381c000 r4:c381c000<br>&gt;<br>&gt; <c004ceb0> <c004ceb0> (irq_exit+0x0/0x84) (irq_exit+0x0/0x84) from<br>&gt; <c002804c> from <c002804c> (asm_do_IRQ+0x4c/0x64)<br>&gt; (asm_do_IRQ+0x4c/0x64)<br>&gt; &nbsp;r4:0000001a r4:0000001a<br>&gt;<br>&gt; <c0028000> <c0028000> (asm_do_IRQ+0x0/0x64) (asm_do_IRQ+0x0/0x64) from<br>&gt; <c0338bb0> from <c0338bb0> (__irq_svc+0x30/0x60)<br>&gt; (__irq_svc+0x30/0x60)<br>&gt; Exception stack(0xc381dce8 to 0xc381dd30)<br>&gt; Exception stack(0xc381dce8 to 0xc381dd30)<br>&gt; dce0: dce0:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 00000000 00000000 c3bd22e0<br>&gt; c3bd22e0 00000000 00000000 00000000 00000000 c0079820 c0079820 c0433040<br>&gt; c0433040<br>&gt;<br>&gt; dd00: dd00: 40000013 40000013 00000000 00000000 00000014 00000014 00000000<br>&gt; 00000000 c3bd22e0 c3bd22e0 c381dd64 c381dd64 c381dd08 c381dd08 c381dd30<br>&gt; c381dd30<br>&gt;<br>&gt; dd20: dd20: c00797fc c00797fc c00791a0 c00791a0 60000013 60000013 ffffffff<br>&gt; ffffffff<br>&gt;<br>&gt; &nbsp;r6:001a0000 r6:001a0000 r5:f4040000 r5:f4040000 r4:ffffffff r4:ffffffff<br>&gt;<br>&gt; <c0078fa0> <c0078fa0> (setup_irq+0x0/0x28c) (setup_irq+0x0/0x28c) from<br>&gt; <c00792f8> from <c00792f8> (request_irq+0xcc/0xf8)<br>&gt; (request_irq+0xcc/0xf8)<br>&gt; <c007922c> <c007922c> (request_irq+0x0/0xf8) (request_irq+0x0/0xf8) from<br>&gt; <c0238f50> from <c0238f50> (imx_startup+0xb8/0x184)<br>&gt; (imx_startup+0xb8/0x184)<br>&gt; <c0238e98> <c0238e98> (imx_startup+0x0/0x184) (imx_startup+0x0/0x184)<br>&gt; from <c02360c8> from <c02360c8> (uart_startup+0x90/0x194)<br>&gt; (uart_startup+0x90/0x194)<br>&gt; &nbsp;r5:c3b9a800 r5:c3b9a800 r4:00000000 r4:00000000<br>&gt;<br>&gt; <c0236038> <c0236038> (uart_startup+0x0/0x194) (uart_startup+0x0/0x194)<br>&gt; from <c0237ecc> from <c0237ecc> (uart_open+0x184/0x45c)<br>&gt; (uart_open+0x184/0x45c)<br>&gt; <c0237d48> <c0237d48> (uart_open+0x0/0x45c) (uart_open+0x0/0x45c) from<br>&gt; <c02211b4> from <c02211b4> (tty_open+0x188/0x2e0)<br>&gt; (tty_open+0x188/0x2e0)<br>&gt; <c022102c> <c022102c> (tty_open+0x0/0x2e0) (tty_open+0x0/0x2e0) from<br>&gt; <c00a9834> from <c00a9834> (chrdev_open+0x120/0x164)<br>&gt; (chrdev_open+0x120/0x164)<br>&gt; <c00a9714> <c00a9714> (chrdev_open+0x0/0x164) (chrdev_open+0x0/0x164)<br>&gt; from <c00a4d60> from <c00a4d60> (__dentry_open+0x158/0x274)<br>&gt; (__dentry_open+0x158/0x274)<br>&gt; &nbsp;r7:c00a9714 r7:c00a9714 r6:00000000 r6:00000000 r5:c342c410 r5:c342c410<br>&gt; r4:c3b715a0 r4:c3b715a0<br>&gt;<br>&gt; <c00a4c08> <c00a4c08> (__dentry_open+0x0/0x274)<br>&gt; (__dentry_open+0x0/0x274) from <c00a4eb4> from <c00a4eb4><br>&gt; (nameidata_to_filp+0x38/0x50)<br>&gt; (nameidata_to_filp+0x38/0x50)<br>&gt; <c00a4e7c> <c00a4e7c> (nameidata_to_filp+0x0/0x50)<br>&gt; (nameidata_to_filp+0x0/0x50) from <c00b2164> from <c00b2164><br>&gt; (do_filp_open+0x354/0x6e0)<br>&gt; (do_filp_open+0x354/0x6e0)<br>&gt; &nbsp;r4:00000000 r4:00000000<br>&gt;<br>&gt; <c00b1e10> <c00b1e10> (do_filp_open+0x0/0x6e0) (do_filp_open+0x0/0x6e0)<br>&gt; from <c00a4b1c> from <c00a4b1c> (do_sys_open+0x5c/0xec)<br>&gt; (do_sys_open+0x5c/0xec)<br>&gt; <c00a4ac0> <c00a4ac0> (do_sys_open+0x0/0xec) (do_sys_open+0x0/0xec) from<br>&gt; <c00a4be4> from <c00a4be4> (sys_open+0x24/0x28)<br>&gt; (sys_open+0x24/0x28)<br>&gt; &nbsp;r8:00000000 r8:00000000 r7:00000000 r7:00000000 r6:00000000 r6:00000000<br>&gt; r5:c0021fd0 r5:c0021fd0 r4:c044bcf8 r4:c044bcf8<br>&gt;<br>&gt; <c00a4bc0> <c00a4bc0> (sys_open+0x0/0x28) (sys_open+0x0/0x28) from<br>&gt; <c0028444> from <c0028444> (init_post+0x30/0x104)<br>&gt; (init_post+0x30/0x104)<br>&gt; <c0028414> <c0028414> (init_post+0x0/0x104) (init_post+0x0/0x104) from<br>&gt; <c000893c> from <c000893c> (kernel_init+0xb4/0xd8)<br>&gt; (kernel_init+0xb4/0xd8)<br>&gt; &nbsp;r4:c044bcf8 r4:c044bcf8<br>&gt;<br>&gt; <c0008888> <c0008888> (kernel_init+0x0/0xd8) (kernel_init+0x0/0xd8) from<br>&gt; <c004ab48> from <c004ab48> (do_exit+0x0/0x798)<br>&gt; (do_exit+0x0/0x798)<br>&gt; &nbsp;r5:00000000 r5:00000000 r4:00000000 r4:00000000<br>&gt;<br>&gt;<br>&gt;<br>Are you getting any extra output (that you didn't have before patching<br>the serial driver)?<br>Ie it could be that you were always getting this lockup just at the<br>wrong baud rate so you couldn't see it.<br><br>Please try the following patch instead:<br>And look for the @HACK@ output.<br>That should show if someone else is trying to set the serial port wrongly.<br><br><br>diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c<br>index 18130f1..0bf841e 100644<br>--- a/drivers/serial/imx.c<br>+++ b/drivers/serial/imx.c<br>@@ -573,6 +573,7 @@ static int imx_setup_ufcr(struct imx_port *sport,<br>unsigned int mode)<br>        unsigned int val;<br>        unsigned int ufcr_rfdiv;<br><br>+#if 0<br>        /* set receiver / transmitter trigger level.<br>         * RFDIV is set such way to satisfy requested uartclk value<br>         */<br>@@ -586,7 +587,9 @@ static int imx_setup_ufcr(struct imx_port *sport,<br>unsigned int mode)<br>        val |= UFCR_RFDIV_REG(ufcr_rfdiv);<br><br>        writel(val, sport-&gt;port.membase + UFCR);<br>-<br>+#else<br>+       printk(KERN_INFO "@HACK@ ignoring imx_setup_ufcr %d\n",<br>sport-&gt;port.line);<br>+#endif<br>        return 0;<br> }<br><br>@@ -789,6 +792,7 @@ imx_set_termios(struct uart_port *port, struct<br>ktermios *termios,<br>        unsigned long num, denom;<br>        uint64_t tdiv64;<br><br>+#if 0<br>        /*<br>         * If we don't support modem control lines, don't allow<br>         * these to be set.<br>@@ -931,6 +935,13 @@ imx_set_termios(struct uart_port *port, struct<br>ktermios *termios,<br>                imx_enable_ms(&amp;sport-&gt;port);<br><br>        spin_unlock_irqrestore(&amp;sport-&gt;port.lock, flags);<br>+#else<br>+       printk(KERN_INFO "@HACK@ ignoring imx_set_termios %d baud=%d<br>flags=%X\n",<br>+               sport-&gt;port.line,<br>+               uart_get_baud_rate(port, termios, old, 50, port-&gt;uartclk / 16),<br>+               termios-&gt;c_cflag);<br>+#endif<br>+<br> }<br><br> static const char *imx_type(struct uart_port *port)<br><br>_______________________________________________<br>linux-arm mailing list<br>linux-arm@lists.infradead.org<br><a href="http://lists.infradead.org/mailman/listinfo/linux-arm">http://lists.infradead.org/mailman/listinfo/linux-arm</a><br></c004ab48></c004ab48></c0008888></c0008888></c000893c></c000893c></c0028414></c0028414></c0028444></c0028444></c00a4bc0></c00a4bc0></c00a4be4></c00a4be4></c00a4ac0></c00a4ac0></c00a4b1c></c00a4b1c></c00b1e10></c00b1e10></c00b2164></c00b2164></c00a4e7c></c00a4e7c></c00a4eb4></c00a4eb4></c00a4c08></c00a4c08></c00a4d60></c00a4d60></c00a9714></c00a9714></c00a9834></c00a9834></c022102c></c022102c></c02211b4></c02211b4></c0237d48></c0237d48></c0237ecc></c0237ecc></c0236038></c0236038></c02360c8></c02360c8></c0238e98></c0238e98></c0238f50></c0238f50></c007922c></c007922c></c00792f8></c00792f8></c0078fa0></c0078fa0></c0338bb0></c0338bb0></c0028000></c0028000></c002804c></c002804c></c004ceb0></c004ceb0></c004cefc></c004cefc></c004cb44></c004cb44></c0338bb0></c0338bb0></c0028000></c0028000></c0028048></c0028048></c007a200></c007a200></c007a294></c007a294></c00788f4></c00788f4></c0338bb0></c0338bb0></c0028000></c0028000></c0028048></c0028048></c007a200></c007a200></c007a294></c007a294></c00788f4></c00788f4></c0078938></c0078938></c00332f4></c00332f4></c0033320></c0033320></c005fa70></c005fa70></c005fbd8></c005fbd8></c005eb60></c005eb60></c005ebb8></c005ebb8></c006500c></c006500c></c0065098></c0065098></c0051a64></c0051a64></c0051a90></c0051a90></c00515e8></c00515e8></c0051604></c0051604></c0078348></c0078348></c0078450></c0078450></c0029d40></c0029d40></c007a294></c0078920></c007a294></c0078920></pre>
</mfuzzey@gmail.com></blockquote></div><div></div></font><pre>=====-----=====-----=====
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