Why flush_cache_vmap flushes all levels of the all caches?
Cho, Kyong Ho
pullip at gmail.com
Mon Apr 12 20:45:11 EDT 2010
Even though flush_cache_vmap(arch/arm/include/asm/cacheflush.h), that
is invoked whenever a new VM-PM mapping on the HIMEM is created, does
not flush the entire cache for non-aliasing VIPT caches from 2.6.30, I
am curious why it must flush the entire cache for other caches such as
VIVT or VIPT prior to ARMv7.
static inline void flush_cache_vmap(unsigned long start, unsigned long end)
* set_pte_at() called from vmap_pte_range() does not
* have a DSB after cleaning the cache line.
I guess the following situation:
(1) A cache line contains stale, dirty data that is allocated by an
old page mapping and is not flushed when the page mapping is removed
(but as far as I know, flush_cache_vunmap is always invoked whenever a
page mapping is removed)
(2) New page mapping on the HIMEM is created.
(3) Data in the page frame mapped by (2) is modified through the new
(4) After a while, the cache line that I mentioned in (1) still
contains stale data by the old page mapping and becomes a victim.
(5) Data in the cache line is flushed into the main memory even though
no page mapping exists
As a result of the above situation, the main memory is modified by an
invalid data and not coherent with the cache.
Is my assumption correct?
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