Problem with USB on S3C2412
José Miguel Gonçalves
jose.goncalves at inov.pt
Thu Nov 12 10:00:43 EST 2009
I've made progresses on this issue.
It seems that this was caused by a conflict between the PWM module and
the timer that is used to generate the system clock on S3C24XX (Timer
4). I've noticed that because, when I was able to boot successfully my
system clock was 8 times slower that it should be. The following patch
fixed that (and fixed other minor issues on the clock generator system):
diff -Naurp
linux-2.6.27.39.original/arch/arm/mach-s3c2410/include/mach/regs-clock.h
linux-2.6.27.39/arch/arm/mach-s3c2410/include/mach/regs-clock.h
---
linux-2.6.27.39.original/arch/arm/mach-s3c2410/include/mach/regs-clock.h
2009-11-10 00:59:38.000000000 +0000
+++ linux-2.6.27.39/arch/arm/mach-s3c2410/include/mach/regs-clock.h
2009-11-11 19:16:37.761165411 +0000
@@ -46,7 +46,7 @@
#define S3C2410_PLLCON_PDIVSHIFT 4
#define S3C2410_PLLCON_SDIVSHIFT 0
#define S3C2410_PLLCON_MDIVMASK ((1<<(1+(19-12)))-1)
-#define S3C2410_PLLCON_PDIVMASK ((1<<5)-1)
+#define S3C2410_PLLCON_PDIVMASK ((1<<(1+(9-4)))-1)
#define S3C2410_PLLCON_SDIVMASK 3
/* DCLKCON register addresses in gpio.h */
diff -Naurp linux-2.6.27.39.original/arch/arm/mach-s3c2412/clock.c
linux-2.6.27.39/arch/arm/mach-s3c2412/clock.c
--- linux-2.6.27.39.original/arch/arm/mach-s3c2412/clock.c 2009-11-10
00:59:38.000000000 +0000
+++ linux-2.6.27.39/arch/arm/mach-s3c2412/clock.c 2009-11-11
19:16:37.761165411 +0000
@@ -129,7 +129,7 @@ static int s3c2412_setparent_usysclk(str
static struct clk clk_usysclk = {
.name = "usysclk",
.id = -1,
- .parent = &clk_xtal,
+ .parent = &clk_urefclk,
.set_parent = s3c2412_setparent_usysclk,
};
@@ -141,7 +141,7 @@ static struct clk clk_mrefclk = {
static struct clk clk_mdivclk = {
.name = "mdivclk",
- .parent = &clk_xtal,
+ .parent = &clk_mrefclk,
.id = -1,
};
@@ -400,6 +400,8 @@ static struct clk clk_i2s = {
.round_rate = s3c2412_roundrate_clksrc,
};
+#ifndef CONFIG_CPU_S3C2412_ONLY
+
static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent)
{
unsigned long clksrc = __raw_readl(S3C2412_CLKSRC);
@@ -450,6 +452,8 @@ static struct clk clk_cam = {
.round_rate = s3c2412_roundrate_clksrc,
};
+#endif
+
/* standard clock definitions */
static struct clk init_clocks_disable[] = {
@@ -603,7 +607,7 @@ struct clk_init {
static struct clk_init clks_src[] __initdata = {
{
.clk = &clk_usysclk,
- .bit = S3C2412_CLKSRC_USBCLK_HCLK,
+ .bit = S3C2412_CLKSRC_USYSCLK_UPLL,
.src_0 = &clk_urefclk,
.src_1 = &clk_upll,
}, {
@@ -611,11 +615,13 @@ static struct clk_init clks_src[] __init
.bit = S3C2412_CLKSRC_I2SCLK_MPLL,
.src_0 = &clk_erefclk,
.src_1 = &clk_mpll,
+#ifndef CONFIG_CPU_S3C2412_ONLY
}, {
.clk = &clk_cam,
.bit = S3C2412_CLKSRC_CAMCLK_HCLK,
.src_0 = &clk_usysclk,
.src_1 = &clk_h,
+#endif
}, {
.clk = &clk_msysclk,
.bit = S3C2412_CLKSRC_MSYSCLK_MPLL,
diff -Naurp linux-2.6.27.39.original/arch/arm/plat-s3c24xx/clock.c
linux-2.6.27.39/arch/arm/plat-s3c24xx/clock.c
--- linux-2.6.27.39.original/arch/arm/plat-s3c24xx/clock.c 2009-11-10
00:59:38.000000000 +0000
+++ linux-2.6.27.39/arch/arm/plat-s3c24xx/clock.c 2009-11-11
19:16:37.761165411 +0000
@@ -392,7 +392,7 @@ static int s3c24xx_clkout_setparent(stru
/* calculate the MISCCR setting for the clock */
- if (parent == &clk_xtal)
+ if (parent == &clk_mpll)
source = S3C2410_MISCCR_CLK0_MPLL;
else if (parent == &clk_upll)
source = S3C2410_MISCCR_CLK0_UPLL;
diff -Naurp linux-2.6.27.39.original/arch/arm/plat-s3c24xx/pwm-clock.c
linux-2.6.27.39/arch/arm/plat-s3c24xx/pwm-clock.c
--- linux-2.6.27.39.original/arch/arm/plat-s3c24xx/pwm-clock.c
2009-11-10 00:59:38.000000000 +0000
+++ linux-2.6.27.39/arch/arm/plat-s3c24xx/pwm-clock.c 2009-11-11
19:20:37.229916682 +0000
@@ -274,7 +274,6 @@ static struct pwm_tdiv_clk clk_timer_tdi
.name = "pwm-tdiv",
.parent = &clk_timer_scaler[1],
.get_rate = clk_pwm_tdiv_get_rate,
- .set_rate = clk_pwm_tdiv_set_rate,
.round_rate = clk_pwm_tdiv_round_rate,
},
},
@@ -356,7 +355,6 @@ static struct clk clk_tin[] = {
[4] = {
.name = "pwm-tin",
.id = 4,
- .set_parent = clk_pwm_tin_set_parent,
},
};
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