<p><br>
On Nov 13, 2012 7:38 PM, "Linus Walleij" <<a href="mailto:linus.walleij@linaro.org">linus.walleij@linaro.org</a>> wrote:<br>
><br>
> On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar <<a href="mailto:viresh.kumar@linaro.org">viresh.kumar@linaro.org</a>> wrote:<br>
><br>
> > From: Shiraz Hashim <<a href="mailto:shiraz.hashim@st.com">shiraz.hashim@st.com</a>><br>
> ><br>
> > SPEAr platform provides a provision to control chipselects of ARM PL022 Prime<br>
> > Cell spi controller through its system registers, which otherwise remains under<br>
> > PL022 control which some protocols do not want.<br>
><br>
> So I guess this platform us utilizing the cs_control field of the<br>
> PL022 platform data to do the actual magic, right?</p>
<p>Correct.</p>
<p>> > This patch adds spics controller nodes in device tree for various SPEAr13xx<br>
> > SoCs.<br>
> ><br>
> > Cc: Linus Walleij <<a href="mailto:linus.walleij@linaro.org">linus.walleij@linaro.org</a>><br>
> > Signed-off-by: Shiraz Hashim <<a href="mailto:shiraz.hashim@st.com">shiraz.hashim@st.com</a>><br>
> > Reviewed-by: Vipin Kumar <<a href="mailto:vipin.kumar@st.com">vipin.kumar@st.com</a>><br>
> > Signed-off-by: Viresh Kumar <<a href="mailto:viresh.kumar@linaro.org">viresh.kumar@linaro.org</a>><br>
> (...)<br>
> > ahb {<br>
> > + spics: spics@e0700000{<br>
> > + compatible = "st,spear-spics-gpio";<br>
> > + reg = <0xe0700000 0x1000>;<br>
> > + st-spics,peripcfg-reg = <0x3b0>;<br>
> > + st-spics,sw-enable-bit = <12>;<br>
> > + st-spics,cs-value-bit = <11>;<br>
> > + st-spics,cs-enable-mask = <3>;<br>
> > + st-spics,cs-enable-shift = <8>;<br>
> > + gpio-controller;<br>
> > + #gpio-cells = <2>;<br>
> > + };<br>
> > +<br>
><br>
> Are these bindings documented?</p>
<p>The main patch waiting for ur comments is 1/14.</p>
<p>> Apart from that remark:<br>
> Acked-by: Linus Walleij <<a href="mailto:linus.walleij@linaro.org">linus.walleij@linaro.org</a>><br>
><br>
> Yours,<br>
> Linus Walleij<br>
</p>