The VIC chips can be handled by the generic implementation. The implementation uses always uses handle_level_irq. We can replace the ack and mask functions by a combined mask_ack function which also gets rid of the double write to VIC_INT_ENABLE_CLEAR. Signed-off-by: Thomas Gleixner --- arch/arm/common/vic.c | 152 ++++++++++++-------------------------------------- 1 file changed, 39 insertions(+), 113 deletions(-) Index: linux-2.6/arch/arm/common/vic.c =================================================================== --- linux-2.6.orig/arch/arm/common/vic.c +++ linux-2.6/arch/arm/common/vic.c @@ -33,26 +33,20 @@ /** * struct vic_device - VIC PM device * @sysdev: The system device which is registered. - * @irq: The IRQ number for the base of the VIC. - * @base: The register base for the VIC. - * @resume_sources: A bitmask of interrupts for resume. - * @resume_irqs: The IRQs enabled for resume. + * @gc: The generic irq chip for the VIC * @int_select: Save for VIC_INT_SELECT. * @int_enable: Save for VIC_INT_ENABLE. * @soft_int: Save for VIC_INT_SOFT. * @protect: Save for VIC_PROTECT. */ struct vic_device { - struct sys_device sysdev; + struct sys_device sysdev; - void __iomem *base; - int irq; - u32 resume_sources; - u32 resume_irqs; - u32 int_select; - u32 int_enable; - u32 soft_int; - u32 protect; + struct irq_chip_generic *gc; + u32 int_select; + u32 int_enable; + u32 soft_int; + u32 protect; }; /* we cannot allocate memory when VICs are initially registered */ @@ -89,7 +83,7 @@ static void vic_init2(void __iomem *base static int vic_class_resume(struct sys_device *dev) { struct vic_device *vic = to_vic(dev); - void __iomem *base = vic->base; + void __iomem *base = vic->gc->reg_base; printk(KERN_DEBUG "%s: resuming vic at %p\n", __func__, base); @@ -114,7 +108,7 @@ static int vic_class_resume(struct sys_d static int vic_class_suspend(struct sys_device *dev, pm_message_t state) { struct vic_device *vic = to_vic(dev); - void __iomem *base = vic->base; + void __iomem *base = vic->gc->reg_base; printk(KERN_DEBUG "%s: suspending vic at %p\n", __func__, base); @@ -126,8 +120,8 @@ static int vic_class_suspend(struct sys_ /* set the interrupts (if any) that are used for * resuming the system */ - writel(vic->resume_irqs, base + VIC_INT_ENABLE); - writel(~vic->resume_irqs, base + VIC_INT_ENABLE_CLEAR); + writel(vic->gc->wake_active, base + VIC_INT_ENABLE); + writel(~vic->gc->wake_active, base + VIC_INT_ENABLE_CLEAR); return 0; } @@ -178,15 +172,13 @@ late_initcall(vic_pm_init); /** * vic_pm_register - Register a VIC for later power management control - * @base: The base address of the VIC. - * @irq: The base IRQ for the VIC. - * @resume_sources: bitmask of interrupts allowed for resume sources. + * @gc: The generic interrupt chip for the VIC * * Register the VIC with the system device tree so that it can be notified * of suspend and resume requests and ensure that the correct actions are * taken to re-instate the settings on resume. */ -static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) +static void __init vic_pm_register(struct irq_chip_generic *gc) { struct vic_device *v; @@ -194,85 +186,13 @@ static void __init vic_pm_register(void printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); else { v = &vic_devices[vic_id]; - v->base = base; - v->resume_sources = resume_sources; - v->irq = irq; - vic_id++; + v->gc = gc; } } #else -static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } +static inline void vic_pm_register(struct irq_generic_chip *gc) { } #endif /* CONFIG_PM */ -static void vic_ack_irq(struct irq_data *d) -{ - void __iomem *base = irq_data_get_irq_chip_data(d); - unsigned int irq = d->irq & 31; - writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); - /* moreover, clear the soft-triggered, in case it was the reason */ - writel(1 << irq, base + VIC_INT_SOFT_CLEAR); -} - -static void vic_mask_irq(struct irq_data *d) -{ - void __iomem *base = irq_data_get_irq_chip_data(d); - unsigned int irq = d->irq & 31; - writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); -} - -static void vic_unmask_irq(struct irq_data *d) -{ - void __iomem *base = irq_data_get_irq_chip_data(d); - unsigned int irq = d->irq & 31; - writel(1 << irq, base + VIC_INT_ENABLE); -} - -#if defined(CONFIG_PM) -static struct vic_device *vic_from_irq(unsigned int irq) -{ - struct vic_device *v = vic_devices; - unsigned int base_irq = irq & ~31; - int id; - - for (id = 0; id < vic_id; id++, v++) { - if (v->irq == base_irq) - return v; - } - - return NULL; -} - -static int vic_set_wake(struct irq_data *d, unsigned int on) -{ - struct vic_device *v = vic_from_irq(d->irq); - unsigned int off = d->irq & 31; - u32 bit = 1 << off; - - if (!v) - return -EINVAL; - - if (!(bit & v->resume_sources)) - return -EINVAL; - - if (on) - v->resume_irqs |= bit; - else - v->resume_irqs &= ~bit; - - return 0; -} -#else -#define vic_set_wake NULL -#endif /* CONFIG_PM */ - -static struct irq_chip vic_chip = { - .name = "VIC", - .irq_ack = vic_ack_irq, - .irq_mask = vic_mask_irq, - .irq_unmask = vic_unmask_irq, - .irq_set_wake = vic_set_wake, -}; - static void __init vic_disable(void __iomem *base) { writel(0, base + VIC_INT_SELECT); @@ -296,21 +216,26 @@ static void __init vic_clear_interrupts( } } -static void __init vic_set_irq_sources(void __iomem *base, - unsigned int irq_start, u32 vic_sources) -{ - unsigned int i; - - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - irq_set_chip_and_handler(irq, &vic_chip, - handle_level_irq); - irq_set_chip_data(irq, base); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } +static struct irq_chip_generic * __init +vic_set_irq_sources(void __iomem *base, unsigned int irq_start, + u32 vic_sources, u32 resume_sources) +{ + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_alloc_generic_chip("VIC", 1, irq_start, base, handle_level_irq); + gc->wake_enabled = resume_sources; + ct = gc->chip_types; + ct->chip.irq_mask_ack = irq_gc_mask_disable_reg_and_ack; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.irq_set_wake = irq_gc_set_wake; + ct->regs.ack = VIC_INT_SOFT_CLEAR; + ct->regs.disable = VIC_INT_ENABLE_CLEAR; + ct->regs.enable = VIC_INT_ENABLE; + + irq_setup_generic_chip(gc, vic_sources, IRQ_NOREQUEST | IRQ_NOPROBE, + IRQ_LEVEL); + return gc; } /* @@ -347,7 +272,7 @@ static void __init vic_init_st(void __io writel(32, base + VIC_PL190_DEF_VECT_ADDR); } - vic_set_irq_sources(base, irq_start, vic_sources); + vic_set_irq_sources(base, irq_start, vic_sources, 0); } /** @@ -360,6 +285,7 @@ static void __init vic_init_st(void __io void __init vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources) { + struct irq_chip_generic *gc; unsigned int i; u32 cellid = 0; enum amba_vendor vendor; @@ -392,7 +318,7 @@ void __init vic_init(void __iomem *base, vic_init2(base); - vic_set_irq_sources(base, irq_start, vic_sources); + gc = vic_set_irq_sources(base, irq_start, vic_sources, resume_sources); - vic_pm_register(base, irq_start, resume_sources); + vic_pm_register(gc); }