<br><pre>At&nbsp;2011-04-12&nbsp;15:29:43，"David&nbsp;Gibson"&nbsp;&lt;david@gibson.dropbear.id.au&gt;&nbsp;wrote:

&gt;On&nbsp;Fri,&nbsp;Apr&nbsp;08,&nbsp;2011&nbsp;at&nbsp;04:06:09PM&nbsp;+0800,&nbsp;bill&nbsp;wrote:
&gt;&gt;&nbsp;Hey,&nbsp;MM&nbsp;developers:)
&gt;&gt;&nbsp;
&gt;&gt;&nbsp;I&nbsp;don't&nbsp;know&nbsp;if&nbsp;this&nbsp;posting&nbsp;is&nbsp;proper&nbsp;at&nbsp;here,&nbsp;so&nbsp;sorry&nbsp;for&nbsp;disturbing&nbsp;if&nbsp;it&nbsp;does.&nbsp;
&gt;&gt;&nbsp;
&gt;&gt;&nbsp;for&nbsp;normal&nbsp;4K&nbsp;page:&nbsp;in&nbsp;unmap_page_range&nbsp;
&gt;&gt;&nbsp;1:&nbsp;tlb_start_vma(tlb,&nbsp;vma);&nbsp;&lt;------&nbsp;call&nbsp;&nbsp;flush_cache_range&nbsp;to&nbsp;invalidate&nbsp;icache&nbsp;if&nbsp;vma&nbsp;is&nbsp;VM_EXEC
&gt;&gt;&nbsp;2:&nbsp;clear&nbsp;pagetable&nbsp;mapping
&gt;&gt;&nbsp;3:&nbsp;tlb_end_vma(tlb,&nbsp;vma);&nbsp;&lt;--------&nbsp;call&nbsp;flush_tlb_range&nbsp;to&nbsp;invalidate&nbsp;unmapped&nbsp;vma&nbsp;tlb&nbsp;entry
&gt;&gt;&nbsp;
&gt;&gt;&nbsp;for&nbsp;hugepage:&nbsp;in&nbsp;__unmap_hugepage_range
&gt;&gt;&nbsp;1:&nbsp;clear&nbsp;pagetable&nbsp;mapping
&gt;&gt;&nbsp;&nbsp;2:&nbsp;call&nbsp;flush_tlb_range(vma,&nbsp;start,&nbsp;end);&nbsp;to&nbsp;invalidate&nbsp;unmapped&nbsp;vma&nbsp;tlb&nbsp;entry
&gt;&gt;&nbsp;
&gt;&gt;&nbsp;I&nbsp;really&nbsp;don't&nbsp;understand&nbsp;about&nbsp;two&nbsp;things:
&gt;&gt;&nbsp;A:&nbsp;why&nbsp;there&nbsp;is&nbsp;no&nbsp;&nbsp;flush_cache_range&nbsp;for&nbsp;hugepage&nbsp;when&nbsp;we&nbsp;do&nbsp;the&nbsp;unmapping?
&gt;&gt;&nbsp;B:&nbsp;How&nbsp;does&nbsp;kernel&nbsp;take&nbsp;care&nbsp;of&nbsp;such&nbsp;case&nbsp;for&nbsp;both&nbsp;normal&nbsp;4K&nbsp;page&nbsp;and&nbsp;hugepage:
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;a:&nbsp;mmap&nbsp;a&nbsp;page&nbsp;with&nbsp;PROT_EXEC&nbsp;at&nbsp;location&nbsp;p;
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;b:&nbsp;copy&nbsp;bunch&nbsp;instruction&nbsp;into&nbsp;p&nbsp;,call&nbsp;cacheflush&nbsp;to&nbsp;make&nbsp;ICACHE&nbsp;see&nbsp;the&nbsp;new&nbsp;instruction;&nbsp;
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;c:&nbsp;run&nbsp;instruction&nbsp;at&nbsp;location&nbsp;p,&nbsp;then&nbsp;unmap&nbsp;it;
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;d:&nbsp;mmap&nbsp;a&nbsp;new&nbsp;page&nbsp;with&nbsp;MAP_FIXED/PROT_EXEC&nbsp;at&nbsp;location&nbsp;p,&nbsp;and&nbsp;run&nbsp;unexpected&nbsp;instruction&nbsp;at&nbsp;p;
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;there&nbsp;is&nbsp;a&nbsp;great&nbsp;chance&nbsp;we&nbsp;got&nbsp;the&nbsp;same&nbsp;page&nbsp;at&nbsp;step_a;
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;user&nbsp;space&nbsp;should&nbsp;see&nbsp;a&nbsp;clean&nbsp;icache,&nbsp;not&nbsp;a&nbsp;stale&nbsp;one;
&gt;&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
&gt;&gt;&nbsp;I&nbsp;am&nbsp;really&nbsp;puzzled&nbsp;for&nbsp;a&nbsp;long&nbsp;time.
&gt;
&gt;&gt;&nbsp;I&nbsp;am&nbsp;porting&nbsp;hugepage&nbsp;for&nbsp;ARM&nbsp;,and&nbsp;one&nbsp;testcase&nbsp;in&nbsp;libhugetlbfs
&gt;&gt;&nbsp;called&nbsp;icache-hygiene&nbsp;failed,&nbsp;test&nbsp;rationale&nbsp;is&nbsp;described&nbsp;in&nbsp;above
&gt;&gt;&nbsp;B.
&gt;
&gt;Yes,&nbsp;that&nbsp;testcase&nbsp;is&nbsp;designed&nbsp;to&nbsp;check&nbsp;exactly&nbsp;this.
&gt;
&gt;This&nbsp;is&nbsp;a&nbsp;bit&nbsp;of&nbsp;a&nbsp;hack.&nbsp;&nbsp;On&nbsp;x86&nbsp;machines,&nbsp;nothing&nbsp;special&nbsp;is&nbsp;required
&gt;here,&nbsp;because&nbsp;the&nbsp;dcache&nbsp;and&nbsp;icache&nbsp;are&nbsp;coherent&nbsp;in&nbsp;hardware.&nbsp;&nbsp;This&nbsp;is
&gt;also&nbsp;true&nbsp;on&nbsp;many&nbsp;power&nbsp;machines,&nbsp;including&nbsp;all&nbsp;moderm&nbsp;POWER
&gt;hardware.&nbsp;&nbsp;However,&nbsp;this&nbsp;is&nbsp;not&nbsp;true&nbsp;on&nbsp;old&nbsp;POWER4&nbsp;hardware,&nbsp;and&nbsp;that
&gt;testcase&nbsp;was&nbsp;designed&nbsp;to&nbsp;detect&nbsp;this&nbsp;bug&nbsp;which&nbsp;we&nbsp;once&nbsp;had&nbsp;on&nbsp;that
&gt;hardware.
&gt;
&gt;For&nbsp;powerpc,&nbsp;the&nbsp;cache&nbsp;flush&nbsp;is&nbsp;handled&nbsp;in&nbsp;the&nbsp;arch&nbsp;specific&nbsp;code:
&gt;flush_dcache_icache_page()&nbsp;is&nbsp;called&nbsp;from&nbsp;set_pte_filter()&nbsp;and
&gt;set_access_flags_filter().&nbsp;&nbsp;Those&nbsp;I&nbsp;believe&nbsp;are&nbsp;called&nbsp;from&nbsp;set_pte()
&gt;and&nbsp;set_ptep_access_flags().
&gt;
&gt;There&nbsp;is&nbsp;some&nbsp;extra&nbsp;code&nbsp;here&nbsp;to&nbsp;only&nbsp;lazily&nbsp;flush&nbsp;the&nbsp;icache&nbsp;if&nbsp;the
&gt;page&nbsp;is&nbsp;not&nbsp;immediately&nbsp;executed&nbsp;from.&nbsp;&nbsp;That&nbsp;is,&nbsp;we&nbsp;keep&nbsp;track&nbsp;of
&gt;whether&nbsp;the&nbsp;page&nbsp;is&nbsp;icache&nbsp;clean,&nbsp;and&nbsp;if&nbsp;we&nbsp;receive&nbsp;a&nbsp;read&nbsp;or&nbsp;write
&gt;fault&nbsp;on&nbsp;the&nbsp;page&nbsp;we&nbsp;don't&nbsp;clean&nbsp;it&nbsp;but&nbsp;map&nbsp;it&nbsp;without&nbsp;execute
&gt;permission.&nbsp;&nbsp;We&nbsp;only&nbsp;perform&nbsp;the&nbsp;icache&nbsp;flush&nbsp;when&nbsp;we&nbsp;get&nbsp;an&nbsp;actual
&gt;execute&nbsp;fault&nbsp;on&nbsp;the&nbsp;page.
&gt;
&gt;You&nbsp;will&nbsp;either&nbsp;need&nbsp;to&nbsp;implement&nbsp;similar&nbsp;hacks&nbsp;in&nbsp;ARM,&nbsp;or&nbsp;move&nbsp;the
&gt;flushing&nbsp;logic&nbsp;into&nbsp;the&nbsp;generic&nbsp;code.
&gt;
&gt;--&nbsp;
&gt;David&nbsp;Gibson                        |&nbsp;I'll&nbsp;have&nbsp;my&nbsp;music&nbsp;baroque,&nbsp;and&nbsp;my&nbsp;code
&gt;david&nbsp;AT&nbsp;gibson.dropbear.id.au        |&nbsp;minimalist,&nbsp;thank&nbsp;you.&nbsp;&nbsp;NOT&nbsp;_the_&nbsp;_other_
&gt;                                |&nbsp;_way_&nbsp;_around_!
&gt;http://www.ozlabs.org/~dgibson<br><br>Thanks for your advice, I will do such hack for ARM:)<br><br><br><br><br></pre><br><br><span title="neteasefooter"><span id="netease_mail_footer"></span></span>