<br><br><div class="gmail_quote">On Tue, Apr 5, 2011 at 11:57 PM, Kevin Hilman <span dir="ltr"><<a href="mailto:khilman@ti.com">khilman@ti.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<div class="im">"Avinash.H.M" <<a href="mailto:avinashhm@ti.com">avinashhm@ti.com</a>> writes:<br>
<br>
> The i2c module has a special reset sequence. The sequence is<br>
> - Disable the I2C.<br>
> - Write to SOFTRESET bit.<br>
> - Enable the I2C.<br>
> - Poll on the RESETDONE bit.<br>
> This sequence must be followed for i2c reset in omap2, omap3. The sequence is<br>
> implemented as a function and the i2c_class is updated with the correct<br>
> 'reset' pointer.<br>
><br>
> Cc: Rajendra Nayak <<a href="mailto:rnayak@ti.com">rnayak@ti.com</a>><br>
> Cc: Paul Walmsley <<a href="mailto:paul@pwsan.com">paul@pwsan.com</a>><br>
> Cc: Benoit Cousson <<a href="mailto:b-cousson@ti.com">b-cousson@ti.com</a>><br>
> Cc: Kevin Hilman <<a href="mailto:khilman@ti.com">khilman@ti.com</a>><br>
> Signed-off-by: Avinash.H.M <<a href="mailto:avinashhm@ti.com">avinashhm@ti.com</a>><br>
<br>
</div>[...]<br>
<div class="im"><br>
> +<br>
> +/**<br>
> + * omap_i2c_reset- reset the omap i2c module.<br>
> + * @oh: struct omap_hwmod *<br>
> + *<br>
> + * The i2c moudle in omap2, omap3 had a special sequence to reset. The<br>
> + * sequence is:<br>
> + * - Disable the I2C.<br>
> + * - Write to SOFTRESET bit.<br>
> + * - Enable the I2C.<br>
> + * - Poll on the RESETDONE bit.<br>
> + * The sequence is implemented in below function. This is called for 2420,<br>
> + * 2430 and omap3.<br>
> + */<br>
> +int omap_i2c_reset(struct omap_hwmod *oh)<br>
> +{<br>
> + u32 v;<br>
> + int c = 0;<br>
> +<br>
> + /* Disable I2C */<br>
> + v = omap_hwmod_read(oh, I2C_CON_OFFSET);<br>
> + v = v & ~I2C_EN;<br>
> + omap_hwmod_write(v, oh, I2C_CON_OFFSET);<br>
> +<br>
> + /* Write to the SOFTRESET bit */<br>
> + v = oh->_sysc_cache;<br>
> + v |= (0x1 << oh->class->sysc->sysc_fields->srst_shift);<br>
> +<br>
> + oh->_sysc_cache = v;<br>
> + omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);<br>
<br>
</div>Direct SYSCONFIG access isn't right here. This should go through<br>
omap_hwmod.<br>
<br>
What is probably needed is exposing _ocp_softreset to device code<br>
via something like omap_hwmod_ocp_softreset() and calling that here.<br>
<font color="#888888"><br></font></blockquote><div><br>Hi Kevin , <br><br>thanks for the review. <br><br>OK. I ll create a wrapper function ' omap_hwmod_ocp_softreset'<br>around '_ocp_softreset' and call it here .<br>
</div><div><br>b r ,<br>- avinash.<br><br> </div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;"><font color="#888888">
Kevin<br>
</font></blockquote></div><br>