<div>Hi Santosh,</div>
<div><br> </div>
<div class="gmail_quote">On Wed, Mar 2, 2011 at 6:48 AM, Santosh Shilimkar <span dir="ltr">&lt;<a href="mailto:santosh.shilimkar@ti.com">santosh.shilimkar@ti.com</a>&gt;</span> wrote:<br>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0px 0px 0px 0.8ex; BORDER-LEFT: #ccc 1px solid">Hello,<br>
<div>
<div></div>
<div class="h5">&gt; -----Original Message-----<br>&gt; From: <a href="mailto:linux-omap-owner@vger.kernel.org">linux-omap-owner@vger.kernel.org</a> [mailto:<a href="mailto:linux-omap-">linux-omap-</a><br>&gt; <a href="mailto:owner@vger.kernel.org">owner@vger.kernel.org</a>] On Behalf Of Fernando Guzman Lugo<br>
&gt; Sent: Wednesday, March 02, 2011 1:17 AM<br>&gt; To: <a href="mailto:hiroshi.doyu@nokia.com">hiroshi.doyu@nokia.com</a><br>&gt; Cc: <a href="mailto:tony@atomide.com">tony@atomide.com</a>; <a href="mailto:linux@arm.linux.org.uk">linux@arm.linux.org.uk</a>; linux-<br>
&gt; <a href="mailto:omap@vger.kernel.org">omap@vger.kernel.org</a>; <a href="mailto:linux-arm-kernel@lists.infradead.org">linux-arm-kernel@lists.infradead.org</a>; linux-<br>&gt; <a href="mailto:kernel@vger.kernel.org">kernel@vger.kernel.org</a>; Ramesh Gupta; Hari Kanigeri<br>
&gt; Subject: [PATCH] omap:iommu-added cache flushing operation for L2<br>&gt; cache<br>&gt;<br>&gt; From: Ramesh Gupta &lt;<a href="mailto:grgupta@ti.com">grgupta@ti.com</a>&gt;<br>&gt;<br>&gt; Signed-off-by: Ramesh Gupta &lt;<a href="mailto:grgupta@ti.com">grgupta@ti.com</a>&gt;<br>
&gt; Signed-off-by: Hari Kanigeri &lt;<a href="mailto:h-kanigeri2@ti.com">h-kanigeri2@ti.com</a>&gt;<br>&gt; ---<br>&gt;  arch/arm/plat-omap/iommu.c |   22 ++++++++--------------<br>&gt;  1 files changed, 8 insertions(+), 14 deletions(-)<br>
&gt;<br>&gt; diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c<br>&gt; index e3eb038..aeb2c33 100644<br>&gt; --- a/arch/arm/plat-omap/iommu.c<br>&gt; +++ b/arch/arm/plat-omap/iommu.c<br>&gt; @@ -471,22 +471,15 @@ EXPORT_SYMBOL_GPL(foreach_iommu_device);<br>
&gt;   */<br>&gt;  static void flush_iopgd_range(u32 *first, u32 *last)<br>&gt;  {<br>&gt; -     /* FIXME: L2 cache should be taken care of if it exists */<br>&gt; -     do {<br>&gt; -             asm(&quot;mcr        p15, 0, %0, c7, c10, 1 @ flush_pgd&quot;<br>
&gt; -                 : : &quot;r&quot; (first));<br>&gt; -             first += L1_CACHE_BYTES / sizeof(*first);<br>&gt; -     } while (first &lt;= last);<br>&gt; +     dmac_flush_range(first, last);<br><br></div></div>
There is note just above this API.<br></blockquote>
<div> </div>
<div>Thank you for your comment. I agree, I will send an updated patch with </div>
<div>proper apis.</div></div><br clear="all">regards 
<div>Ramesh Gupta G</div><br>