Hello Eric,<br><br><div class="gmail_quote">2011/2/10 Eric Miao <span dir="ltr"><<a href="mailto:eric.y.miao@gmail.com">eric.y.miao@gmail.com</a>></span><br><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
Corrected the linux-arm-kernel ML address.<br>
<div><div></div><div class="h5"><br>
On Thu, Feb 10, 2011 at 10:24 AM, Eric Miao <<a href="mailto:eric.y.miao@gmail.com">eric.y.miao@gmail.com</a>> wrote:<br>
> On Thu, Feb 10, 2011 at 7:53 AM, Yupeng Schneider<br>
> <<a href="mailto:yupeng.schneider@ipms.fraunhofer.de">yupeng.schneider@ipms.fraunhofer.de</a>> wrote:<br>
>> Hi all,<br>
>><br>
>> the following patch add the BSP for the Trizeps6 board with pxa168 Processor.<br>
>><br>
>> Signed-off-by: Yupeng Schneider <<a href="mailto:yupeng.schneider@googlemail.com">yupeng.schneider@googlemail.com</a>><br>
><br>
> Hi Yupeng,<br>
><br>
> This is really a nice patch. I would be better if this can be separated into<br>
> some smaller patches further:<br></div></div></blockquote><div> </div><div>thank u <br><br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<div><div class="h5">
><br>
> 1. some of the MFP macros in trizeps6.h, they are generic and can be<br>
> placed into mfp-pxa168.h, or is there any reason that the macros in<br>
> mfp-pxa168.h do not work on your board?<br></div></div></blockquote><div> </div><div>ok, i will place them into mfp-pxa168.h. I just thought it is not prefered to change the mfp-pxa168 file.<br><br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<div><div class="h5">
><br>
> 2. individual patches for adding uart3, audio, and cpld<br></div></div></blockquote><div> </div><div> i would very glad to make them in small patchs. i am just now on travel, and will do that in several days when i am back.<br>
<br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;"><div><div class="h5">
><br>
> 3. then the patch for the board<br>
><br>
> Sounds OK? Let me know your ideas.<br></div></div></blockquote><div> </div><div>AC97+UCB1400: Sound and Touchscreen is ok. The related pxa2xx-ac97 files have to be modified, the changes are not in this patch. If u want, i can patch them later too.<br>
<br>yours,<br>Yupeng<br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;"><div><div class="h5">
><br>
> Thanks<br>
> - eric<br>
><br>
>> ---<br>
>> arch/arm/mach-mmp/Kconfig | 29 ++<br>
>> arch/arm/mach-mmp/Makefile | 1 +<br>
>> arch/arm/mach-mmp/include/mach/audio.h | 29 ++<br>
>> arch/arm/mach-mmp/include/mach/pxa168.h | 21 +<br>
>> arch/arm/mach-mmp/include/mach/regs-apmu.h | 1 +<br>
>> arch/arm/mach-mmp/include/mach/trizeps6.h | 122 ++++++<br>
>> arch/arm/mach-mmp/include/mach/trizeps6_cpld.h | 87 +++++<br>
>> arch/arm/mach-mmp/pxa168.c | 10 +<br>
>> arch/arm/mach-mmp/trizeps6.c | 469<br>
>> ++++++++++++++++++++++++<br>
>> arch/arm/mach-mmp/trizeps6_cpld.c | 145 ++++++++<br>
>> 10 files changed, 914 insertions(+), 0 deletions(-)<br>
>> create mode 100755 arch/arm/mach-mmp/include/mach/audio.h<br>
>> create mode 100755 arch/arm/mach-mmp/include/mach/trizeps6.h<br>
>> create mode 100755 arch/arm/mach-mmp/include/mach/trizeps6_cpld.h create<br>
>> mode 100755 arch/arm/mach-mmp/trizeps6.c<br>
>> create mode 100755 arch/arm/mach-mmp/trizeps6_cpld.c<br>
>><br>
>> diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index<br>
>> 0711d3b..8c6be81 100644<br>
>> --- a/arch/arm/mach-mmp/Kconfig<br>
>> +++ b/arch/arm/mach-mmp/Kconfig<br>
>> @@ -64,6 +64,35 @@ config MACH_TETON_BGA<br>
>> Say 'Y' here if you want to support the Marvell PXA168-based<br>
>> Teton BGA Development Board.<br>
>><br>
>> +comment "Third Party Dev Platforms (sorted by vendor name)"<br>
>> +<br>
>> +config MACH_TRIZEPS6<br>
>> + bool "Keith und Koep Trizeps6 DIMM-Module"<br>
>> + select TRIZEPS6_PCMCIA<br>
>> + select CPU_PXA168<br>
>> + help<br>
>> + Say 'Y' here if you want to support TRIZEPS VI board Development Board.<br>
>> +<br>
>> +choice<br>
>> + prompt "Select base board for Trizeps module"<br>
>> + depends on MACH_TRIZEPS6<br>
>> +<br>
>> +config MACH_TRIZEPS6_CONXS<br>
>> + bool "ConXS Eval Board"<br>
>> +<br>
>> +config MACH_TRIZEPS6_UCONXS<br>
>> + bool "uConXS Eval Board"<br>
>> +<br>
>> +config MACH_TRIZEPS6_ANY<br>
>> + bool "another Board"<br>
>> +<br>
>> +endchoice<br>
>> +<br>
>> +config TRIZEPS6_PCMCIA<br>
>> + bool<br>
>> + help<br>
>> + Enable PCMCIA support for Trizeps modules<br>
>> +<br>
>> endmenu<br>
>><br>
>> config CPU_PXA168<br>
>> diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index<br>
>> 751cdbf..1b8744f 100644<br>
>> --- a/arch/arm/mach-mmp/Makefile<br>
>> +++ b/arch/arm/mach-mmp/Makefile<br>
>> @@ -18,3 +18,4 @@ obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o<br>
>> obj-$(CONFIG_MACH_FLINT) += flint.o<br>
>> obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o<br>
>> obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o<br>
>> +obj-$(CONFIG_MACH_TRIZEPS6) += trizeps6.o trizeps6_cpld.o<br>
>> diff --git a/arch/arm/mach-mmp/include/mach/audio.h<br>
>> b/arch/arm/mach-mmp/include/mach/audio.h<br>
>> index 0000000..6ef474f<br>
>> --- /dev/null<br>
>> +++ b/arch/arm/mach-mmp/include/mach/audio.h<br>
>> @@ -0,0 +1,29 @@<br>
>> +#ifndef __ASM_ARCH_AUDIO_H__<br>
>> +#define __ASM_ARCH_AUDIO_H__<br>
>> +<br>
>> +#include <sound/core.h><br>
>> +#include <sound/pcm.h><br>
>> +#include <sound/ac97_codec.h><br>
>> +<br>
>> +/*<br>
>> + * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)<br>
>> + * a -1 value means no gpio will be used for reset<br>
>> + * @codec_pdata: AC97 codec platform_data<br>
>> +<br>
>> + * reset_gpio should only be specified for pxa27x CPUs where a silicon +<br>
>> * bug prevents correct operation of the reset line. If not specified, + *<br>
>> the default behaviour on these CPUs is to consider gpio 113 as the + *<br>
>> AC97 reset line, which is the default on most boards.<br>
>> + */<br>
>> +struct pxa2xx_audio_ops_t {<br>
>> + int (*startup)(struct snd_pcm_substream *, void *);<br>
>> + void (*shutdown)(struct snd_pcm_substream *, void *);<br>
>> + void (*suspend)(void *);<br>
>> + void (*resume)(void *);<br>
>> + void *priv;<br>
>> + int reset_gpio;<br>
>> + void *codec_pdata[AC97_BUS_MAX_DEVICES];<br>
>> +};<br>
>> +<br>
>> +<br>
>> +#endif<br>
>> diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h<br>
>> b/arch/arm/mach-mmp/include/mach/pxa168.h<br>
>> index 1801e42..c4a9977 100644<br>
>> --- a/arch/arm/mach-mmp/include/mach/pxa168.h<br>
>> +++ b/arch/arm/mach-mmp/include/mach/pxa168.h<br>
>> @@ -14,9 +14,12 @@ extern void pxa168_clear_keypad_wakeup(void);<br>
>> #include <video/pxa168fb.h><br>
>> #include <plat/pxa27x_keypad.h><br>
>> #include <mach/cputype.h><br>
>> +#include <linux/pxa168_eth.h><br>
>> +#include <mach/audio.h><br>
>><br>
>> extern struct pxa_device_desc pxa168_device_uart1;<br>
>> extern struct pxa_device_desc pxa168_device_uart2;<br>
>> +extern struct pxa_device_desc pxa168_device_uart3;<br>
>> extern struct pxa_device_desc pxa168_device_twsi0;<br>
>> extern struct pxa_device_desc pxa168_device_twsi1;<br>
>> extern struct pxa_device_desc pxa168_device_pwm1;<br>
>> @@ -31,6 +34,9 @@ extern struct pxa_device_desc pxa168_device_ssp5;<br>
>> extern struct pxa_device_desc pxa168_device_nand;<br>
>> extern struct pxa_device_desc pxa168_device_fb;<br>
>> extern struct pxa_device_desc pxa168_device_keypad;<br>
>> +extern struct pxa_device_desc pxa168_device_mfu;<br>
>> +extern struct pxa_device_desc pxa168_device_ac97;<br>
>> +<br>
>><br>
>> static inline int pxa168_add_uart(int id)<br>
>> {<br>
>> @@ -39,6 +45,7 @@ static inline int pxa168_add_uart(int id)<br>
>> switch (id) {<br>
>> case 1: d = &pxa168_device_uart1; break;<br>
>> case 2: d = &pxa168_device_uart2; break;<br>
>> + case 3: d = &pxa168_device_uart3; break;<br>
>> }<br>
>><br>
>> if (d == NULL)<br>
>> @@ -117,4 +124,18 @@ static inline int pxa168_add_keypad(struct<br>
>> pxa27x_keypad_platform_data *data)<br>
>> return pxa_register_device(&pxa168_device_keypad, data, sizeof(*data));<br>
>> }<br>
>><br>
>> +static inline int pxa168_add_mfu(struct pxa168_eth_platform_data *data) +{<br>
>> +#if defined(CONFIG_PXA168_ETH)<br>
>> + return pxa_register_device(&pxa168_device_mfu, data, sizeof(*data)); +#else<br>
>> + return 0;<br>
>> +#endif<br>
>> +}<br>
>> +<br>
>> +static inline int pxa168_add_ac97(struct pxa2xx_audio_ops_t *ops) +{<br>
>> + return pxa_register_device(&pxa168_device_ac97, ops , sizeof(*ops)); +}<br>
>> +<br>
>> #endif /* __ASM_MACH_PXA168_H */<br>
>> diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h<br>
>> b/arch/arm/mach-mmp/include/mach/regs-apmu.h<br>
>> index ac47023..68d39bc 100644<br>
>> --- a/arch/arm/mach-mmp/include/mach/regs-apmu.h<br>
>> +++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h<br>
>> @@ -27,6 +27,7 @@<br>
>> #define APMU_DMA APMU_REG(0x064)<br>
>> #define APMU_GEU APMU_REG(0x068)<br>
>> #define APMU_BUS APMU_REG(0x06c)<br>
>> +#define APMU_MFU APMU_REG(0x0fc)<br>
>><br>
>> #define APMU_FNCLK_EN (1 << 4)<br>
>> #define APMU_AXICLK_EN (1 << 3)<br>
>> diff --git a/arch/arm/mach-mmp/include/mach/trizeps6.h<br>
>> b/arch/arm/mach-mmp/include/mach/trizeps6.h<br>
>> index 0000000..40b526a<br>
>> --- /dev/null<br>
>> +++ b/arch/arm/mach-mmp/include/mach/trizeps6.h<br>
>> @@ -0,0 +1,122 @@<br>
>> +/************************************************************************<br>
>> + * Include file for TRIZEPS6 SoM and ConXS eval-board<br>
>> + * Copyright (c) Yupeng Schneider<br>
>> + * 2010<br>
>> +<br>
>> ************************************************************************/ +<br>
>> +/*<br>
>> + * Includes/Defines<br>
>> + */<br>
>> +#ifndef _TRIPEPS6_H_<br>
>> +#define _TRIPEPS6_H_<br>
>> +<br>
>> +#define STUART_SODIMM 1<br>
>> +<br>
>> +/* UART */<br>
>> +#define GPIO104_UART1_DSR MFP_CFG(GPIO104, AF2)<br>
>> +#define GPIO105_UART1_DCD MFP_CFG(GPIO105, AF2)<br>
>> +#define GPIO107_UART2_TXD MFP_CFG_DRV(GPIO126, AF2, FAST)<br>
>> +#define GPIO107_UART2_RXD MFP_CFG_DRV(GPIO36, AF2, FAST)<br>
>> +#define GPIO109_UART2_CTS MFP_CFG(GPIO123, AF2)<br>
>> +#define GPIO109_UART2_RTS MFP_CFG(GPIO124, AF2)<br>
>> +#define GPIO30_UART3_TXD MFP_CFG_DRV(GPIO30, AF2, FAST)<br>
>> +#define GPIO31_UART3_RXD MFP_CFG_DRV(GPIO31, AF2, FAST)<br>
>> +#define GPIO32_UART3_CTS MFP_CFG(GPIO32, AF2)<br>
>> +#define GPIO33_UART3_RTS MFP_CFG(GPIO33, AF2)<br>
>> +<br>
>> +/* MMC2 */<br>
>> +#define GPIO122_MMC2_DAT3 MFP_CFG_DRV(GPIO122, AF4, FAST)<br>
>> +#define GPIO121_MMC2_DAT2 MFP_CFG_DRV(GPIO121, AF4, FAST)<br>
>> +#define GPIO120_MMC2_DAT1 MFP_CFG_DRV(GPIO120, AF4, FAST)<br>
>> +#define GPIO119_MMC2_DAT0 MFP_CFG_DRV(GPIO119, AF4, FAST)<br>
>> +#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST)<br>
>> +#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST)<br>
>> +#define GPIO53_MMC2_CD MFP_CFG(GPIO53, AF0)<br>
>> +<br>
>> +/*MMC4*/<br>
>> +#define GPIO78_MMC4_DAT3 MFP_CFG_DRV(GPIO78, AF5, FAST)<br>
>> +#define GPIO79_MMC4_DAT2 MFP_CFG_DRV(GPIO79, AF5, FAST)<br>
>> +#define GPIO80_MMC4_DAT1 MFP_CFG_DRV(GPIO80, AF5, FAST)<br>
>> +#define GPIO81_MMC4_DAT0 MFP_CFG_DRV(GPIO81, AF5, FAST)<br>
>> +#define GPIO82_MMC4_CMD MFP_CFG_DRV(GPIO82, AF5, FAST)<br>
>> +#define GPIO83_MMC4_CLK MFP_CFG_DRV(GPIO83, AF5, FAST)<br>
>> +<br>
>> +/* I2C */<br>
>> +#define GPIO102_CI2C_SDA MFP_CFG(GPIO102, AF1)<br>
>> +<br>
>> +/* MFU */<br>
>> +#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5)<br>
>> +#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5)<br>
>> +#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5)<br>
>> +#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5)<br>
>> +#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5)<br>
>> +#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5)<br>
>> +#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5)<br>
>> +#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5)<br>
>> +#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5)<br>
>> +#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5)<br>
>> +#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5)<br>
>> +#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5)<br>
>> +#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5)<br>
>> +#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5)<br>
>> +#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5)<br>
>> +#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5)<br>
>> +#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5)<br>
>> +<br>
>> +/* AC97 */<br>
>> +#define GPIO115_AC97_BITCLK MFP_CFG(GPIO115, AF6)<br>
>> +#define GPIO114_AC97_SDATA_IN_0 MFP_CFG(GPIO114, AF6)<br>
>> +#define GPIO116_AC97_SDATA_IN_1 MFP_CFG(GPIO116, AF6)<br>
>> +#define GPIO117_AC97_SDATA_OUT MFP_CFG(GPIO117, AF6)<br>
>> +#define GPIO118_AC97_SYNC MFP_CFG(GPIO118, AF6)<br>
>> +<br>
>> +<br>
>> +<br>
>> +#define TRIZEPS6_PHYS_BASE 0xd4000000<br>
>> +<br>
>> +<br>
>> +#define TRIZEPS6_PIC_PHYS (0x88000000) /* CS0-3 Logic chip on ConXS */<br>
>> + /* Logic on ConXS-board CSFR register*/<br>
>> +#define TRIZEPS6_CFSR_PHYS (TRIZEPS6_PIC_PHYS)<br>
>> + /* Logic on ConXS-board BOCR register*/<br>
>> +#define TRIZEPS6_BOCR_PHYS (TRIZEPS6_PIC_PHYS+0x00200000)<br>
>> + /* Logic on ConXS-board IRCR register*/<br>
>> +#define TRIZEPS6_IRCR_PHYS (TRIZEPS6_PIC_PHYS+0x00300000)<br>
>> + /* Logic on ConXS-board UPSR register*/<br>
>> +#define TRIZEPS6_UPSR_PHYS (TRIZEPS6_PIC_PHYS+0x00280000)<br>
>> + /* Logic on ConXS-board DICR register*/<br>
>> +#define TRIZEPS6_DICR_PHYS (TRIZEPS6_PIC_PHYS+0x00380000)<br>
>> +<br>
>> +<br>
>> +#define TRIZEPS6_CPLD_PHYS (0x8e000000) /* CPLD on Trizeps6 module */ +<br>
>> +#define TRIZEPS6_CPLD_CTRL_PHYS (TRIZEPS6_CPLD_PHYS)<br>
>> +#define TRIZEPS6_CPLD_FTUR_PHYS (TRIZEPS6_CPLD_PHYS+0x4)<br>
>> +#define TRIZEPS6_CPLD_HIBE_PHYS (TRIZEPS6_CPLD_PHYS+0x8)<br>
>> +#define TRIZEPS6_CPLD_PWM_PHYS (TRIZEPS6_CPLD_PHYS+0xc)<br>
>> +#define TRIZEPS6_CPLD_PLDR_PHYS (TRIZEPS6_CPLD_PHYS+0x10)<br>
>> +#define TRIZEPS6_CPLD_PSET_PHYS (TRIZEPS6_CPLD_PHYS+0x14)<br>
>> +#define TRIZEPS6_CPLD_TTLO_PHYS (TRIZEPS6_CPLD_PHYS+0x18)<br>
>> +<br>
>> +<br>
>> +/* MMC socket */<br>
>> +#define GPIO_MMC2_DET 53<br>
>> +#define TRIZEPS6_MMC2_IRQ IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO53))<br>
>> +#define GPIO_MMC4_DET 41<br>
>> +#define TRIZEPS6_MMC4_IRQ IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO41)<br>
>> +<br>
>> +/* Off-module PIC on ConXS board */<br>
>> +#define GPIO_PIC 51<br>
>> +#define TRIZEPS6_PIC_IRQ IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO51)<br>
>> +<br>
>> +/* PCMCIA socket Compact Flash */<br>
>> +#define GPIO_PCD 43 /* PCMCIA Card Detect */<br>
>> +#define TRIZEPS6_CD_IRQ IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO43)<br>
>> +#define GPIO_PRDY 113 /* READY / nINT */<br>
>> +#define TRIZEPS6_READY_NINT IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO113) +<br>
>> +#define trizeps6_GPIO_CODEC_IRQ 116<br>
>> +<br>
>> +extern void trizeps6_ac97_acreset(int i);<br>
>> +<br>
>> +#endif /* _TRIPEPS6_H_ */<br>
>> diff --git a/arch/arm/mach-mmp/include/mach/trizeps6_cpld.h<br>
>> b/arch/arm/mach-mmp/include/mach/trizeps6_cpld.h<br>
>> index 0000000..8538a6b<br>
>> --- /dev/null<br>
>> +++ b/arch/arm/mach-mmp/include/mach/trizeps6_cpld.h<br>
>> @@ -0,0 +1,87 @@<br>
>> +#ifndef _TRIPEPS6_CPLD_H_<br>
>> +#define _TRIPEPS6_CPLD_H_<br>
>> +<br>
>> +/* index of resource */<br>
>> +#define CTRL_S 0<br>
>> +#define CTRL_R 1<br>
>> +#define FTUR_S 2<br>
>> +#define FTUR_R 3<br>
>> +#define HIBE_S 4<br>
>> +#define HIBE_R 5<br>
>> +#define PWM 6<br>
>> +#define PLDR_S 7<br>
>> +#define PLDR_R 8<br>
>> +#define PSET_S 9<br>
>> +#define PSET_R 10<br>
>> +#define TTLO_S 11<br>
>> +#define TTLO_R 12<br>
>> +<br>
>> +#define CPLD_CTRL_S cpld.addr[CTRL_S].val<br>
>> +#define CPLD_CTRL_R cpld.addr[CTRL_R].val<br>
>> +#define CPLD_CONTROL_GR (1 << 0)<br>
>> +#define CPLD_CONTROL_CODEC (1 << 2)<br>
>> +#define CPLD_CONTROL_ETHPHY (1 << 3)<br>
>> +#define CPLD_CONTROL_RWL (1 << 4)<br>
>> +#define CPLD_CONTROL_RBT (1 << 5)<br>
>> +<br>
>> +#define CPLD_FTUR_S cpld.addr[FTUR_S].val<br>
>> +#define CPLD_FTUR_R cpld.addr[FTUR_R].val<br>
>> +#define CPLD_FEATURE_UART3_SODIMM (1 << 0)<br>
>> +#define CPLD_FEATURE_UART3_BT (1 << 1)<br>
>> +#define CPLD_FEATURE_CF_MODE (1 << 2)<br>
>> +#define CPLD_FEATURE_TTLIO (1 << 3)<br>
>> +#define CPLD_PWM_SODIMM_P69 (1 << 4)<br>
>> +#define CPLD_PWM_SODIMM_P77 (1 << 5)<br>
>> +#define CPLD_PWM_SODIMM_P106 (1 << 6)<br>
>> +#define CPLD_BT_PWM_SODIMM (1 << 7)<br>
>> +<br>
>> +#define CPLD_HIBE_S cpld.addr[HIBE_S].val<br>
>> +#define CPLD_HIBE_R cpld.addr[HIBE_R].val<br>
>> +#define CPLD_HIBERNATE_MODE (1 << 0)<br>
>> +#define CPLD_HIBERNATE_WAKE_TOUCH (1 << 1)<br>
>> +#define CPLD_HIBERNATE_WAKE_PMIC (1 << 2)<br>
>> +#define CPLD_HIBERNATE_WAKE_IRQ_P43 (1 << 3)<br>
>> +<br>
>> +#define CPLD_PWM cpld.addr[PWM].val<br>
>> +<br>
>> +#define CPLD_PINLDR cpld.addr[PINLDR].val<br>
>> +#define CPLD_PINLDR_P69 (1 << 0)<br>
>> +#define CPLD_PINLDR_P100_PSKTSEL (1 << 1)<br>
>> +#define CPLD_PINLDR_P98_CFNREG (1 << 2)<br>
>> +#define CPLD_PINLDR_P104_CFNIOIS16 (1 << 3)<br>
>> +#define CPLD_PINLDR_P93_RDNWR (1 << 4)<br>
>> +#define CPLD_PINLDR_P104_IRQ_P43 (1 << 5)<br>
>> +<br>
>> +#define CPLD_PSET_S cpld.addr[PSET_S].val<br>
>> +#define CPLD_PSET_R cpld.addr[PSET_R].val<br>
>> +#define CPLD_PINSET_P69 (1 << 0)<br>
>> +#define CPLD_PINSET_P100_PSKTSEL (1 << 1)<br>
>> +#define CPLD_PINSET_P98_CFNREG (1 << 2)<br>
>> +#define CPLD_PINSET_P104_CFNIOIS16 (1 << 3)<br>
>> +#define CPLD_PINSET_P93_RDnWR (1 << 4)<br>
>> +<br>
>> +#define CPLD_TTLO_S cpld.addr[TTLO_S].val<br>
>> +#define CPLD_TTLO_R cpld.addr[TTLO_R].val<br>
>> +#define CPLD_TTLIO_W_A8 (1 << 0)<br>
>> +#define CPLD_TTLIO_W_A9 (1 << 1)<br>
>> +#define CPLD_TTLIO_W_A10 (1 << 2)<br>
>> +#define CPLD_TTLIO_W_A11 (1 << 3)<br>
>> +#define CPLD_TTLIO_W_A12 (1 << 4)<br>
>> +#define CPLD_TTLIO_W_A13 (1 << 5)<br>
>> +#define CPLD_TTLIO_W_A14 (1 << 6)<br>
>> +#define CPLD_TTLIO_W_A15 (1 << 7)<br>
>> +#define CPLD_TTLIO_r_A0 (1 << 0)<br>
>> +#define CPLD_TTLIO_r_A1 (1 << 1)<br>
>> +#define CPLD_TTLIO_r_A2 (1 << 2)<br>
>> +#define CPLD_TTLIO_r_A3 (1 << 3)<br>
>> +#define CPLD_TTLIO_r_A4 (1 << 4)<br>
>> +#define CPLD_TTLIO_r_A5 (1 << 5)<br>
>> +#define CPLD_TTLIO_r_A6 (1 << 6)<br>
>> +#define CPLD_TTLIO_r_A7 (1 << 7)<br>
>> +<br>
>> +<br>
>> +<br>
>> +extern unsigned short trizeps6_cpld_readw(unsigned int reg);<br>
>> +extern inline void trizeps6_cpld_writew(unsigned int reg, unsigned short<br>
>> value);<br>
>> +<br>
>> +#endif /* _TRIPEPS6_CPLD_H_ */<br>
>> diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index<br>
>> 72b4e76..9c2396e 100644<br>
>> --- a/arch/arm/mach-mmp/pxa168.c<br>
>> +++ b/arch/arm/mach-mmp/pxa168.c<br>
>> @@ -66,6 +66,7 @@ void __init pxa168_init_irq(void)<br>
>> /* APB peripheral clocks */<br>
>> static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);<br>
>> static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);<br>
>> +static APBC_CLK(uart3, PXA168_UART3, 1, 14745600);<br>
>> static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);<br>
>> static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);<br>
>> static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);<br>
>> @@ -78,14 +79,18 @@ static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);<br>
>> static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);<br>
>> static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);<br>
>> static APBC_CLK(keypad, PXA168_KPC, 0, 32000);<br>
>> +static APBC_CLK(ac97, PXA168_AC97, 0, 24576000);<br>
>> +<br>
>><br>
>> static APMU_CLK(nand, NAND, 0x01db, 208000000);<br>
>> static APMU_CLK(lcd, LCD, 0x7f, 312000000);<br>
>> +static APMU_CLK(mfu, MFU, 0x9, 0);<br>
>><br>
>> /* device and clock bindings */<br>
>> static struct clk_lookup pxa168_clkregs[] = {<br>
>> INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),<br>
>> INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),<br>
>> + INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),<br>
>> INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),<br>
>> INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),<br>
>> INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),<br>
>> @@ -100,6 +105,8 @@ static struct clk_lookup pxa168_clkregs[] = {<br>
>> INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),<br>
>> INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),<br>
>> INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),<br>
>> + INIT_CLKREG(&clk_mfu, "pxa168-eth", "MFUCLK"),<br>
>> + INIT_CLKREG(&clk_ac97, "pxa2xx-ac97", "AC97CLK"),<br>
>> };<br>
>><br>
>> static int __init pxa168_init(void)<br>
>> @@ -149,6 +156,7 @@ void pxa168_clear_keypad_wakeup(void)<br>
>> /* on-chip devices */<br>
>> PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);<br>
>> PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);<br>
>> +PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);<br>
>> PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);<br>
>> PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);<br>
>> PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);<br>
>> @@ -163,3 +171,5 @@ PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000,<br>
>> 0x40, 58, 59);<br>
>> PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);<br>
>> PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);<br>
>> PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);<br>
>> +PXA168_DEVICE(mfu, "pxa168-eth", -1, MFU, 0xc0800000, 0x0FFF);<br>
>> +PXA168_DEVICE(ac97, "pxa2xx-ac97", -1, AC97, 0xd402B000, 0x0fff); diff<br>
>> --git a/arch/arm/mach-mmp/trizeps6.c b/arch/arm/mach-mmp/trizeps6.c index<br>
>> 0000000..a935f14<br>
>> --- /dev/null<br>
>> +++ b/arch/arm/mach-mmp/trizeps6.c<br>
>> @@ -0,0 +1,469 @@<br>
>> +/*<br>
>> + * linux/arch/arm/mach-mmp/trizeps6.c<br>
>> + *<br>
>> + * Support for the Keith und Koep Trizeps6 Modul Platform<br>
>> + * based on Marvell PXA168-CPU<br>
>> + *<br>
>> + * Author: Yupeng Schneider<br>
>> + *<br>
>> + * This program is free software; you can redistribute it and/or modify<br>
>> + * it under the terms of the GNU General Public License version 2 as + *<br>
>> publishhed by the Free Software Foundation.<br>
>> + */<br>
>> +<br>
>> +#include <linux/init.h><br>
>> +#include <linux/kernel.h><br>
>> +#include <linux/platform_device.h><br>
>> +#include <linux/mtd/mtd.h><br>
>> +#include <linux/mtd/partitions.h><br>
>> +#include <linux/mtd/nand.h><br>
>> +#include <linux/delay.h><br>
>> +#include <asm/mach-types.h><br>
>> +#include <asm/mach/arch.h><br>
>> +#include <mach/addr-map.h><br>
>> +#include <mach/mfp-pxa168.h><br>
>> +#include <mach/pxa168.h><br>
>> +#include <mach/gpio.h><br>
>> +#include <linux/pxa168_eth.h><br>
>> +#include <mach/irqs.h><br>
>> +#include <mach/trizeps6.h><br>
>> +#include <mach/trizeps6_cpld.h><br>
>> +#include "common.h"<br>
>> +#include <linux/mmc/sdhci.h><br>
>> +#include <linux/ucb1400.h><br>
>> +#include <mach/audio.h><br>
>> +<br>
>> +<br>
>> +static unsigned long trizeps6_pin_config[] __initdata = {<br>
>> + /* Data Flash Interface */<br>
>> + GPIO0_DFI_D15,<br>
>> + GPIO1_DFI_D14,<br>
>> + GPIO2_DFI_D13,<br>
>> + GPIO3_DFI_D12,<br>
>> + GPIO4_DFI_D11,<br>
>> + GPIO5_DFI_D10,<br>
>> + GPIO6_DFI_D9,<br>
>> + GPIO7_DFI_D8,<br>
>> + GPIO8_DFI_D7,<br>
>> + GPIO9_DFI_D6,<br>
>> + GPIO10_DFI_D5,<br>
>> + GPIO11_DFI_D4,<br>
>> + GPIO12_DFI_D3,<br>
>> + GPIO13_DFI_D2,<br>
>> + GPIO14_DFI_D1,<br>
>> + GPIO15_DFI_D0,<br>
>> +<br>
>> + /* Static Memory Controller */<br>
>> + GPIO18_SMC_nCS0,<br>
>> + GPIO34_SMC_nCS1,<br>
>> + GPIO23_SMC_nLUA,<br>
>> + GPIO25_SMC_nLLA,<br>
>> + GPIO28_SMC_RDY,<br>
>> + GPIO29_SMC_SCLK,<br>
>> + GPIO35_SMC_BE1,<br>
>> + GPIO36_SMC_BE2,<br>
>> +<br>
>> +<br>
>> + /* UART1 */<br>
>> + GPIO107_UART1_RXD,<br>
>> + GPIO108_UART1_TXD,<br>
>> + GPIO107_UART1_RXD,<br>
>> + GPIO108_UART1_TXD,<br>
>> + GPIO109_UART1_RTS,<br>
>> + GPIO110_UART1_CTS,<br>
>> + GPIO111_UART1_RI,<br>
>> + GPIO104_UART1_DSR,<br>
>> + GPIO112_UART1_DTR,<br>
>> + GPIO105_UART1_DCD,<br>
>> +<br>
>> + /* UART2 */<br>
>> + GPIO107_UART2_TXD,<br>
>> + GPIO107_UART2_RXD,<br>
>> + GPIO109_UART2_CTS,<br>
>> + GPIO109_UART2_RTS,<br>
>> +<br>
>> + /* UART3 */<br>
>> + GPIO30_UART3_TXD,<br>
>> + GPIO31_UART3_RXD,<br>
>> + GPIO32_UART3_CTS,<br>
>> + GPIO33_UART3_RTS,<br>
>> +<br>
>> +<br>
>> + /* MFU */<br>
>> + GPIO86_TX_CLK,<br>
>> + GPIO87_TX_EN,<br>
>> + GPIO88_TX_DQ3,<br>
>> + GPIO89_TX_DQ2,<br>
>> + GPIO90_TX_DQ1,<br>
>> + GPIO91_TX_DQ0,<br>
>> + GPIO92_MII_CRS,<br>
>> + GPIO93_MII_COL,<br>
>> + GPIO94_RX_CLK,<br>
>> + GPIO95_RX_ER,<br>
>> + GPIO96_RX_DQ3,<br>
>> + GPIO97_RX_DQ2,<br>
>> + GPIO98_RX_DQ1,<br>
>> + GPIO99_RX_DQ0,<br>
>> + GPIO100_MII_MDC,<br>
>> + GPIO101_MII_MDIO,<br>
>> + GPIO103_RX_DV,<br>
>> +<br>
>> + /* USB OTG */<br>
>> + GPIO85_GPIO,<br>
>> + GPIO47_GPIO,<br>
>> +<br>
>> + /* i2c bus */<br>
>> + GPIO102_CI2C_SDA,<br>
>> + GPIO106_CI2C_SCL,<br>
>> +<br>
>> +<br>
>> + /* MMC2 */<br>
>> + GPIO122_MMC2_DAT3 | MFP_PULL_HIGH,<br>
>> + GPIO121_MMC2_DAT2 | MFP_PULL_HIGH,<br>
>> + GPIO120_MMC2_DAT1 | MFP_PULL_HIGH,<br>
>> + GPIO119_MMC2_DAT0 | MFP_PULL_HIGH,<br>
>> + GPIO28_MMC2_CMD | MFP_PULL_HIGH,<br>
>> + GPIO29_MMC2_CLK,<br>
>> + GPIO53_MMC2_CD | MFP_PULL_LOW, /* TRIZEPS6_MMC2_IRQ */<br>
>> +<br>
>> + /* MMC4 */<br>
>> + GPIO78_MMC4_DAT3 | MFP_PULL_HIGH,<br>
>> + GPIO79_MMC4_DAT2 | MFP_PULL_HIGH,<br>
>> + GPIO80_MMC4_DAT1 | MFP_PULL_HIGH,<br>
>> + GPIO81_MMC4_DAT0 | MFP_PULL_HIGH,<br>
>> + GPIO82_MMC4_CMD | MFP_PULL_HIGH,<br>
>> + GPIO83_MMC4_CLK,<br>
>> +<br>
>> + /* LCD */<br>
>> + GPIO56_LCD_FCLK_RD,<br>
>> + GPIO57_LCD_LCLK_A0,<br>
>> + GPIO58_LCD_PCLK_WR,<br>
>> + GPIO59_LCD_DENA_BIAS,<br>
>> + GPIO60_LCD_DD0,<br>
>> + GPIO61_LCD_DD1,<br>
>> + GPIO62_LCD_DD2,<br>
>> + GPIO63_LCD_DD3,<br>
>> + GPIO64_LCD_DD4,<br>
>> + GPIO65_LCD_DD5,<br>
>> + GPIO66_LCD_DD6,<br>
>> + GPIO67_LCD_DD7,<br>
>> + GPIO68_LCD_DD8,<br>
>> + GPIO69_LCD_DD9,<br>
>> + GPIO70_LCD_DD10,<br>
>> + GPIO71_LCD_DD11,<br>
>> + GPIO72_LCD_DD12,<br>
>> + GPIO73_LCD_DD13,<br>
>> + GPIO74_LCD_DD14,<br>
>> + GPIO75_LCD_DD15,<br>
>> +<br>
>> +<br>
>> + /* AC97 */<br>
>> + GPIO115_AC97_BITCLK,<br>
>> + GPIO114_AC97_SDATA_IN_0,<br>
>> + GPIO117_AC97_SDATA_OUT,<br>
>> + GPIO118_AC97_SYNC,<br>
>> + GPIO116_GPIO,<br>
>> +<br>
>> +<br>
>> + GPIO51_GPIO, /* TRIZEPS6_PIC_IRQ */<br>
>> + GPIO27_GPIO, /* Ethernet IRQ */<br>
>> +};<br>
>> +<br>
>> +<br>
>> +<br>
>> +/****************************************************************************<br>
>> + * CPLD<br>
>> +<br>
>> ****************************************************************************/<br>
>> +<br>
>> +static struct resource tri6_cpld_resources[] = {<br>
>> + [CTRL_S] = {<br>
>> + .start = TRIZEPS6_CPLD_CTRL_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_CTRL_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [CTRL_R] = {<br>
>> + .start = TRIZEPS6_CPLD_CTRL_PHYS+2,<br>
>> + .end = TRIZEPS6_CPLD_CTRL_PHYS+3,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [FTUR_S] = {<br>
>> + .start = TRIZEPS6_CPLD_FTUR_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_FTUR_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [FTUR_R] = {<br>
>> + .start = TRIZEPS6_CPLD_FTUR_PHYS+2,<br>
>> + .end = TRIZEPS6_CPLD_FTUR_PHYS+3,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [HIBE_S] = {<br>
>> + .start = TRIZEPS6_CPLD_HIBE_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_HIBE_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [HIBE_R] = {<br>
>> + .start = TRIZEPS6_CPLD_HIBE_PHYS+2,<br>
>> + .end = TRIZEPS6_CPLD_HIBE_PHYS+3,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [PWM] = {<br>
>> + .start = TRIZEPS6_CPLD_PWM_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_PWM_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [PLDR_S] = {<br>
>> + .start = TRIZEPS6_CPLD_PLDR_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_PLDR_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [PLDR_R] = {<br>
>> + .start = TRIZEPS6_CPLD_PLDR_PHYS+2,<br>
>> + .end = TRIZEPS6_CPLD_PLDR_PHYS+3,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [PSET_S] = {<br>
>> + .start = TRIZEPS6_CPLD_PSET_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_PSET_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [PSET_R] = {<br>
>> + .start = TRIZEPS6_CPLD_PSET_PHYS+2,<br>
>> + .end = TRIZEPS6_CPLD_PSET_PHYS+3,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [TTLO_S] = {<br>
>> + .start = TRIZEPS6_CPLD_TTLO_PHYS,<br>
>> + .end = TRIZEPS6_CPLD_TTLO_PHYS+1,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> + [TTLO_R] = {<br>
>> + .start = TRIZEPS6_CPLD_TTLO_PHYS+2,<br>
>> + .end = TRIZEPS6_CPLD_TTLO_PHYS+3,<br>
>> + .flags = IORESOURCE_MEM,<br>
>> + },<br>
>> +};<br>
>> +<br>
>> +static int tri6_cpld_platdata = 1;<br>
>> +<br>
>> +static struct platform_device cpld_device = {<br>
>> + .name = "trizeps6-cpld",<br>
>> + .id = -1,<br>
>> + .num_resources = ARRAY_SIZE(tri6_cpld_resources),<br>
>> + .resource = tri6_cpld_resources,<br>
>> + .dev = {<br>
>> + .platform_data = &tri6_cpld_platdata,<br>
>> + }<br>
>> +};<br>
>> +<br>
>> +<br>
>> +/******************************************************************************<br>
>> + * Audio and Touchscreen<br>
>> +<br>
>> ******************************************************************************/<br>
>> +<br>
>> +static struct ucb1400_pdata trizeps6_ucb1400_pdata = {<br>
>> + .irq = gpio_to_irq(trizeps6_GPIO_CODEC_IRQ),<br>
>> +};<br>
>> +<br>
>> +static struct pxa2xx_audio_ops_t trizeps6_ac97_pdata = {<br>
>> + .codec_pdata = { &trizeps6_ucb1400_pdata, },<br>
>> +};<br>
>> +<br>
>> +static struct platform_device trizeps6_ucb1400_device = {<br>
>> + .name = "ucb1400_core",<br>
>> + .id = -1,<br>
>> + .dev = {<br>
>> + .platform_data = &trizeps6_ucb1400_pdata,<br>
>> + },<br>
>> +};<br>
>> +<br>
>> +static void __init trizeps6_ts_init(void)<br>
>> +{<br>
>> + pxa168_add_ac97(&trizeps6_ac97_pdata);<br>
>> + platform_device_register(&trizeps6_ucb1400_device);<br>
>> +}<br>
>> +<br>
>> +void trizeps6_ac97_acreset(int i)<br>
>> +{ unsigned short value;<br>
>> +<br>
>> + if (i == 1) {<br>
>> +<br>
>> + value = trizeps6_cpld_readw(CTRL_S);<br>
>> + trizeps6_cpld_writew(CTRL_S, value | CPLD_CONTROL_CODEC);<br>
>> + }<br>
>> + if (!i) {<br>
>> + value = trizeps6_cpld_readw(CTRL_R);<br>
>> + trizeps6_cpld_writew(CTRL_R, value | CPLD_CONTROL_CODEC);<br>
>> + }<br>
>> +}<br>
>> +<br>
>> +/******************************************************************************<br>
>> + * Ethernet<br>
>> +<br>
>> ******************************************************************************/<br>
>> +static int trizeps6_eth_init(void)<br>
>> +{<br>
>> + unsigned short value;<br>
>> +<br>
>> + value = trizeps6_cpld_readw(CTRL_R);<br>
>> + trizeps6_cpld_writew(CTRL_R, value | CPLD_CONTROL_ETHPHY);<br>
>> + return 0;<br>
>> +<br>
>> +}<br>
>> +<br>
>> +static struct pxa168_eth_platform_data trizeps6_eth_data = {<br>
>> + .phy_addr = 0x1f,<br>
>> + .port_number = 0,<br>
>> + .init = trizeps6_eth_init,<br>
>> +};<br>
>> +<br>
>> +/******************************************************************************<br>
>> + * NAND<br>
>> +<br>
>> ******************************************************************************/<br>
>> +static struct pxa3xx_nand_timing stnand02gw3b2d_timing = {<br>
>> + .tCH = 10,<br>
>> + .tCS = 40,<br>
>> + .tWH = 20,<br>
>> + .tWP = 24,<br>
>> + .tRH = 20,<br>
>> + .tRP = 24,<br>
>> + .tR = 50000,<br>
>> + .tWHR = 120,<br>
>> + .tAR = 20,<br>
>> +<br>
>> +};<br>
>> +<br>
>> +static struct pxa3xx_nand_cmdset largepage_cmdset = {<br>
>> + .read1 = 0x3000,<br>
>> + .read2 = 0x0050,<br>
>> + .program = 0x1080,<br>
>> + .read_status = 0x0070,<br>
>> + .read_id = 0x0090,<br>
>> + .erase = 0xD060,<br>
>> + .reset = 0x00FF,<br>
>> + .lock = 0x002A,<br>
>> + .unlock = 0x2423,<br>
>> + .lock_status = 0x007A,<br>
>> +};<br>
>> +<br>
>> +static struct pxa3xx_nand_flash trizeps6_flashes[] = {<br>
>> + {<br>
>> + .timing = &stnand02gw3b2d_timing,<br>
>> + .cmdset = &largepage_cmdset,<br>
>> + .page_per_block = 64,<br>
>> + .page_size = 2048,<br>
>> + .flash_width = 8,<br>
>> + .dfc_width = 8,<br>
>> + .num_blocks = 2048,<br>
>> + .chip_id = 0xda20,<br>
>> + },<br>
>> +};<br>
>> +<br>
>> +<br>
>> +static struct mtd_partition trizeps6_nand_partitions[] = {<br>
>> + {<br>
>> + .name = "bootloader",<br>
>> + .offset = 0,<br>
>> + .size = SZ_16M,<br>
>> + .mask_flags = MTD_WRITEABLE,<br>
>> + }, {<br>
>> + .name = "reserved",<br>
>> + .offset = MTDPART_OFS_APPEND,<br>
>> + .size = SZ_128K,<br>
>> + .mask_flags = MTD_WRITEABLE,<br>
>> + }, {<br>
>> + .name = "kernel",<br>
>> + .offset = MTDPART_OFS_APPEND,<br>
>> + .size = (2*SZ_2M + SZ_1M),<br>
>> + .mask_flags = 0,<br>
>> + }, {<br>
>> + .name = "filesystem",<br>
>> + .offset = MTDPART_OFS_APPEND,<br>
>> + .size = (SZ_256M - 3*SZ_8M),<br>
>> + .mask_flags = 0,<br>
>> + }<br>
>> +};<br>
>> +<br>
>> +static struct pxa3xx_nand_platform_data trizeps6_nand_info = {<br>
>> + .enable_arbiter = 1,<br>
>> + .parts = trizeps6_nand_partitions,<br>
>> + .nr_parts = ARRAY_SIZE(trizeps6_nand_partitions),<br>
>> + .flash = trizeps6_flashes,<br>
>> + .num_flash = ARRAY_SIZE(trizeps6_flashes),<br>
>> + .keep_config = 0<br>
>> +};<br>
>> +<br>
>> +<br>
>> +<br>
>> +static struct i2c_board_info trizeps6_i2c_devices[] = {<br>
>> + { I2C_BOARD_INFO("pcf8593", 0x51), },<br>
>> +};<br>
>> +<br>
>> +<br>
>> +/******************************************************************************<br>
>> + * LCD<br>
>> +<br>
>> ******************************************************************************/<br>
>> +static struct fb_videomode trizeps6_video_modes[] = {<br>
>> + [0] = {<br>
>> + .pixclock = 39720,<br>
>> + .refresh = 60,<br>
>> + .xres = 640,<br>
>> + .yres = 480,<br>
>> + .hsync_len = 63,<br>
>> + .left_margin = 12,<br>
>> + .right_margin = 12,<br>
>> + .vsync_len = 4,<br>
>> + .upper_margin = 32,<br>
>> + .lower_margin = 10,<br>
>> + .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,<br>
>> + },<br>
>> +};<br>
>> +<br>
>> +static struct pxa168fb_mach_info trizeps6_lcd_info = {<br>
>> + .id = "Base-trizeps6",<br>
>> + .modes = trizeps6_video_modes,<br>
>> + .num_modes = ARRAY_SIZE(trizeps6_video_modes),<br>
>> + .pix_fmt = PIX_FMT_RGB565,<br>
>> + .io_pin_allocation_mode = PIN_MODE_DUMB_16_GPIO,<br>
>> + .dumb_mode = DUMB_MODE_RGB565,<br>
>> + .active = 1,<br>
>> + .panel_rbswap = 1,<br>
>> + .invert_pixclock = 0,<br>
>> +};<br>
>> +<br>
>> +<br>
>> +static struct platform_device *trizeps6_devices[] __initdata = {<br>
>> + &cpld_device,<br>
>> +};<br>
>> +<br>
>> +static void __init trizeps6_init(void)<br>
>> +{<br>
>> + mfp_config(ARRAY_AND_SIZE(trizeps6_pin_config));<br>
>> +<br>
>> + pxa168_add_uart(1);<br>
>> + pxa168_add_uart(2);<br>
>> +#ifdef STUART_SODIMM<br>
>> + pxa168_add_uart(3);<br>
>> +#endif<br>
>> + pxa168_add_nand(&trizeps6_nand_info);<br>
>> + platform_add_devices(trizeps6_devices,<br>
>> + ARRAY_SIZE(trizeps6_devices));<br>
>> +<br>
>> + pxa168_add_fb(&trizeps6_lcd_info);<br>
>> + pxa168_add_mfu(&trizeps6_eth_data);<br>
>> + pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(trizeps6_i2c_devices));<br>
>> + trizeps6_ts_init();<br>
>> +}<br>
>> +<br>
>> +static void __init trizeps6_map_io(void)<br>
>> +{<br>
>> + mmp_map_io();<br>
>> +}<br>
>> +<br>
>> +MACHINE_START(TRIZEPS6, "PXA168-based Keith & Koep Trizeps VI Development<br>
>> Module")<br>
>> + /* MAINTAINER("Yupeng Schneider" <<a href="mailto:yupeng.schneider@googlemail.com">yupeng.schneider@googlemail.com</a>>) */<br>
>> + .map_io = trizeps6_map_io,<br>
>> + .init_irq = pxa168_init_irq,<br>
>> + .timer = &pxa168_timer,<br>
>> + .init_machine = trizeps6_init,<br>
>> +MACHINE_END<br>
>> +<br>
>> +<br>
>> diff --git a/arch/arm/mach-mmp/trizeps6_cpld.c<br>
>> b/arch/arm/mach-mmp/trizeps6_cpld.c<br>
>> index 0000000..2577b0f<br>
>> --- /dev/null<br>
>> +++ b/arch/arm/mach-mmp/trizeps6_cpld.c<br>
>> @@ -0,0 +1,145 @@<br>
>> +/*<br>
>> + * linux/arch/arm/mach-mmp/trizeps6_cpld.c<br>
>> + *<br>
>> + *<br>
>> + * Author: Yupeng Schneider<br>
>> + * Created: 27 10, 2010<br>
>> + * Copyright: Yupeng Schneider<br>
>> + *<br>
>> + * This program is free software; you can redistribute it and/or modify<br>
>> + * it under the terms of the GNU General Public License version 2 as + *<br>
>> published by the Free Software Foundation.*/<br>
>> +<br>
>> +#include <linux/kernel.h><br>
>> +#include <linux/ioport.h><br>
>> +#include <linux/platform_device.h><br>
>> +#include <linux/device.h><br>
>> +#include <linux/module.h><br>
>> +<br>
>> +#include <asm/io.h><br>
>> +#include <asm/delay.h><br>
>> +#include <mach/trizeps6.h><br>
>> +#include <mach/trizeps6_cpld.h><br>
>> +<br>
>> +struct cpld_info {<br>
>> + struct region {<br>
>> + struct resource *res;<br>
>> + struct resource *req;<br>
>> + void __iomem *iom;<br>
>> + unsigned short val;<br>
>> + } addr[7];<br>
>> +} cpld_info;<br>
>> +<br>
>> +static struct cpld_info cpld = { { { 0 } } };<br>
>> +<br>
>> +inline void trizeps6_cpld_writew(unsigned int reg, unsigned short value) +{<br>
>> + if ((cpld.addr[reg].iom != NULL))<br>
>> + writew(value, cpld.addr[reg].iom);<br>
>> +<br>
>> +}<br>
>> +<br>
>> +unsigned short trizeps6_cpld_readw(unsigned int reg)<br>
>> +{<br>
>> + short value = 0;<br>
>> + if (reg != HIBE_S || reg != HIBE_R || reg != PWM || reg != PSET_S || reg<br>
>> != PSET_R) {<br>
>> +<br>
>> + if ((cpld.addr[reg].iom != NULL))<br>
>> + value = readw(cpld.addr[reg].iom);<br>
>> + }<br>
>> + return value;<br>
>> +}<br>
>> +EXPORT_SYMBOL(trizeps6_cpld_readw);<br>
>> +<br>
>> +static int trizeps6_cpld_probe(struct platform_device *pdev)<br>
>> +{<br>
>> + int i;<br>
>> +<br>
>> + CPLD_CTRL_R = CPLD_CONTROL_ETHPHY | CPLD_CONTROL_GR;<br>
>> +#ifdef STUART_SODIMM<br>
>> + CPLD_FTUR_S = CPLD_FEATURE_UART3_SODIMM;<br>
>> +#endif<br>
>> + for (i = CTRL_S; i <= TTLO_R; i++) {<br>
>> + cpld.addr[i].res = platform_get_resource(pdev, IORESOURCE_MEM, i);<br>
>> + if (cpld.addr[i].res == NULL) {<br>
>> + dev_err(&pdev->dev, "cannot get resource %d area\n", i);<br>
>> + return -EIO;<br>
>> + }<br>
>> + cpld.addr[i].req = request_mem_region(cpld.addr[i].res->start,<br>
>> + 2, pdev->name);<br>
>> + if (cpld.addr[i].req == NULL) {<br>
>> + dev_err(&pdev->dev, "cannot claim addr area %d\n", i);<br>
>> + return -EIO;<br>
>> + }<br>
>> + cpld.addr[i].iom = ioremap(cpld.addr[i].res->start, 2);<br>
>> + if (cpld.addr[i].iom == NULL) {<br>
>> + dev_err(&pdev->dev, "cannot remap addr area %d\n", i);<br>
>> + return -EIO;<br>
>> + }<br>
>> + switch (i) {<br>
>> + case CTRL_R:<br>
>> + trizeps6_cpld_writew(CTRL_R, CPLD_CTRL_R);<br>
>> + break;<br>
>> + case FTUR_S:<br>
>> + trizeps6_cpld_writew(FTUR_S, CPLD_FTUR_S);<br>
>> + break;<br>
>> + default:<br>
>> + ;<br>
>> +<br>
>> + }<br>
>> + dev_dbg(&pdev->dev, "mapped region [%d] %08x -> %p\n", i,<br>
>> + (int)cpld.addr[i].req->start, cpld.addr[i].iom);<br>
>> + }<br>
>> +<br>
>> +<br>
>> + return 0;<br>
>> +}<br>
>> +<br>
>> +static int trizeps6_cpld_remove(struct platform_device *pdev)<br>
>> +{<br>
>> + dev_dbg(&pdev->dev, "trizeps6_cpld_remove()\n");<br>
>> + return 0;<br>
>> +}<br>
>> +<br>
>> +#ifdef CONFIG_PM<br>
>> +static int trizeps6_cpld_suspend(struct platform_device *pdev,<br>
>> pm_message_t state)<br>
>> +{<br>
>> + return 0;<br>
>> +}<br>
>> +<br>
>> +static int trizeps6_cpld_resume(struct platform_device *pdev)<br>
>> +{<br>
>> + return 0;<br>
>> +}<br>
>> +#endif<br>
>> +<br>
>> +static struct platform_driver trizeps6_cpld_driver = {<br>
>> + .probe = trizeps6_cpld_probe,<br>
>> + .remove = trizeps6_cpld_remove,<br>
>> +#ifdef CONFIG_PM<br>
>> + .suspend = trizeps6_cpld_suspend,<br>
>> + .resume = trizeps6_cpld_resume,<br>
>> +#endif<br>
>> + .driver = {<br>
>> + .name = "trizeps6-cpld",<br>
>> + },<br>
>> +};<br>
>> +<br>
>> +<br>
>> +static int __devinit trizeps6_cpld_init(void)<br>
>> +{<br>
>> +<br>
>> + return platform_driver_register(&trizeps6_cpld_driver);<br>
>> +}<br>
>> +<br>
>> +static void trizeps6_cpld_exit(void)<br>
>> +{<br>
>> + platform_driver_unregister(&trizeps6_cpld_driver);<br>
>> +}<br>
>> +<br>
>> +arch_initcall(trizeps6_cpld_init);<br>
>> +module_exit(trizeps6_cpld_exit);<br>
>> +<br>
>> +MODULE_AUTHOR("Yupeng Schneider <<a href="mailto:yupeng.schneider@googlemail.com">yupeng.schneider@googlemail.com</a>>");<br>
>> +MODULE_DESCRIPTION("Trizeps VI CPLD");<br>
>> +MODULE_LICENSE("GPL");<br>
>> --<br>
>> 1.6.3.3<br>
>><br>
>><br>
>><br>
>><br>
><br>
</div></div></blockquote></div><br>