Signed-off-by: Arnaud Patard Index: tst-usb/arch/arm/mach-mx5/devices.c =================================================================== --- tst-usb.orig/arch/arm/mach-mx5/devices.c 2010-12-20 15:38:40.000000000 +0100 +++ tst-usb/arch/arm/mach-mx5/devices.c 2010-12-20 15:39:22.000000000 +0100 @@ -97,6 +97,29 @@ }, }; +static struct resource usbh2_resources[] = { + { + .start = MX51_OTG_BASE_ADDR + 0x400, + .end = MX51_OTG_BASE_ADDR + 0x400 + 0x1ff, + .flags = IORESOURCE_MEM, + }, + { + .start = MX51_MXC_INT_USB_H2, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device mxc_usbh2_device = { + .name = "mxc-ehci", + .id = 2, + .num_resources = ARRAY_SIZE(usbh2_resources), + .resource = usbh2_resources, + .dev = { + .dma_mask = &usb_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + static struct resource mxc_kpp_resources[] = { { .start = MX51_MXC_INT_KPP, Index: tst-usb/arch/arm/mach-mx5/devices.h =================================================================== --- tst-usb.orig/arch/arm/mach-mx5/devices.h 2010-12-20 15:38:40.000000000 +0100 +++ tst-usb/arch/arm/mach-mx5/devices.h 2010-12-20 15:39:22.000000000 +0100 @@ -1,5 +1,6 @@ extern struct platform_device mxc_usbdr_host_device; extern struct platform_device mxc_usbh1_device; +extern struct platform_device mxc_usbh2_device; extern struct platform_device mxc_usbdr_udc_device; extern struct platform_device mxc_hsi2c_device; extern struct platform_device mxc_keypad_device; Index: tst-usb/arch/arm/plat-mxc/include/mach/iomux-mx51.h =================================================================== --- tst-usb.orig/arch/arm/plat-mxc/include/mach/iomux-mx51.h 2010-12-20 15:38:40.000000000 +0100 +++ tst-usb/arch/arm/plat-mxc/include/mach/iomux-mx51.h 2010-12-20 15:39:22.000000000 +0100 @@ -86,17 +86,25 @@ #define MX51_PAD_EIM_DA14__EIM_DA14 IOMUX_PAD(0x7bc, 0x054, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_DA15__EIM_DA15 IOMUX_PAD(0x7bc, 0x058, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D16__GPIO_2_0 IOMUX_PAD(0x3f0, 0x05c, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D16__USBH2_DATA0 IOMUX_PAD(0x3f0, 0x05c, 2, 0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D16__I2C1_SDA IOMUX_PAD(0x3f0, 0x05c, (4 | IOMUX_CONFIG_SION), \ 0x09b4, 0, MX51_I2C_PAD_CTRL) #define MX51_PAD_EIM_D17__GPIO_2_1 IOMUX_PAD(0x3f4, 0x060, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D17__USBH2_DATA1 IOMUX_PAD(0x3f4, 0x060, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D18__GPIO_2_2 IOMUX_PAD(0x3f8, 0x064, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D18__USBH2_DATA2 IOMUX_PAD(0x3f8, 0x064, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D19__GPIO_2_3 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D19__USBH2_DATA3 IOMUX_PAD(0x3fc, 0x068, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D19__I2C1_SCL IOMUX_PAD(0x3fc, 0x068, (4 | IOMUX_CONFIG_SION), \ 0x09b0, 0, MX51_I2C_PAD_CTRL) #define MX51_PAD_EIM_D20__GPIO_2_4 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D20__USBH2_DATA4 IOMUX_PAD(0x400, 0x06c, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) +#define MX51_PAD_EIM_D21__USBH2_DATA5 IOMUX_PAD(0x404, 0x070, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D22__GPIO_2_6 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D22__USBH2_DATA6 IOMUX_PAD(0x408, 0x074, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D23__GPIO_2_7 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D23__USBH2_DATA7 IOMUX_PAD(0x40c, 0x078, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_D24__UART3_CTS IOMUX_PAD(0x410, 0x07c, 3, 0x0, 0, MX51_UART3_PAD_CTRL) #define MX51_PAD_EIM_D25__UART3_RXD IOMUX_PAD(0x414, 0x080, 3, 0x9f4, 0, MX51_UART3_PAD_CTRL) #define MX51_PAD_EIM_D25__UART2_CTS IOMUX_PAD(0x414, 0x080, 4, 0x0, 0, MX51_UART2_PAD_CTRL) @@ -116,9 +124,13 @@ #define MX51_PAD_EIM_A22__GPIO_2_16 IOMUX_PAD(0x448, 0x0b4, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_A23__GPIO_2_17 IOMUX_PAD(0x44c, 0x0b8, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_A24__GPIO_2_18 IOMUX_PAD(0x450, 0x0bc, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_A24__USBH2_CLK IOMUX_PAD(0x450, 0x0bc, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_A25__GPIO_2_19 IOMUX_PAD(0x454, 0x0c0, 1, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_EIM_A26__GPIO_2_20 IOMUX_PAD(0x458, 0x0c4, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_A25__USBH2_DIR IOMUX_PAD(0x454, 0x0c0, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) +#define MX51_PAD_EIM_A26__GPIO_2_20 IOMUX_PAD(0x458, 0x0c4, 1, 0x0, 0, MX51_USBH1_PAD_CTRL) +#define MX51_PAD_EIM_A26__USBH2_STP IOMUX_PAD(0x458, 0x0c4, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_A27__GPIO_2_21 IOMUX_PAD(0x45c, 0x0c8, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_A27__USBH2_NXT IOMUX_PAD(0x45c, 0x0c8, 2, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_EIM_EB0__EIM_EB0 IOMUX_PAD(0x460, 0x0cc, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_EB1__EIM_EB1 IOMUX_PAD(0x464, 0x0d0, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_EB2__GPIO_2_22 IOMUX_PAD(0x468, 0x0d4, 1, 0x0, 0, NO_PAD_CTRL) Index: tst-usb/arch/arm/plat-mxc/ehci.c =================================================================== --- tst-usb.orig/arch/arm/plat-mxc/ehci.c 2010-12-20 15:39:07.000000000 +0100 +++ tst-usb/arch/arm/plat-mxc/ehci.c 2010-12-20 15:39:22.000000000 +0100 @@ -49,6 +49,7 @@ #define MXC_OTG_OFFSET 0 #define MXC_H1_OFFSET 0x200 +#define MXC_H2_OFFSET 0x400 /* USB_CTRL */ #define MXC_OTG_UCTRL_OWIE_BIT (1 << 27) /* OTG wakeup intr enable */ @@ -61,6 +62,11 @@ #define MXC_OTG_PHYCTRL_OC_DIS_BIT (1 << 8) /* OTG Disable Overcurrent Event */ #define MXC_H1_OC_DIS_BIT (1 << 5) /* UH1 Disable Overcurrent Event */ +/* USBH2CTRL */ +#define MXC_H2_UCTRL_H2UIE_BIT (1 << 8) +#define MXC_H2_UCTRL_H2WIE_BIT (1 << 7) +#define MXC_H2_UCTRL_H2PM_BIT (1 << 4) + #define MXC_USBCMD_OFFSET 0x140 /* USBCMD */ @@ -266,6 +272,9 @@ case 1: /* Host 1 port */ usbotg_base = usb_base + MXC_H1_OFFSET; break; + case 2: /* Host 2 port */ + usbotg_base = usb_base + MXC_H2_OFFSET; + break; default: printk(KERN_ERR"%s no such port %d\n", __func__, port); ret = -ENOENT; @@ -329,6 +338,22 @@ v &= MXC_UCMD_ITC_NO_THRESHOLD_MASK; __raw_writel(v, usbotg_base + MXC_USBCMD_OFFSET); break; + case 2: /* Host 2 ULPI */ + v = __raw_readl(usbother_base + MXC_USBH2CTRL_OFFSET); + if (flags & MXC_EHCI_WAKEUP_ENABLED) { + /* HOST1 wakeup/ULPI intr enable */ + v |= (MXC_H2_UCTRL_H2WIE_BIT | MXC_H2_UCTRL_H2UIE_BIT); + } else { + /* HOST1 wakeup/ULPI intr disable */ + v &= ~(MXC_H2_UCTRL_H2WIE_BIT | MXC_H2_UCTRL_H2UIE_BIT); + } + + if (flags & MXC_EHCI_POWER_PINS_ENABLED) + v &= ~MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/ + else + v |= MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/ + __raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET); + break; } error: Index: tst-usb/arch/arm/plat-mxc/include/mach/mxc_ehci.h =================================================================== --- tst-usb.orig/arch/arm/plat-mxc/include/mach/mxc_ehci.h 2010-12-20 15:38:40.000000000 +0100 +++ tst-usb/arch/arm/plat-mxc/include/mach/mxc_ehci.h 2010-12-20 15:39:22.000000000 +0100 @@ -31,6 +31,7 @@ #define MXC_USBCTRL_OFFSET 0 #define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 #define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc +#define MXC_USBH2CTRL_OFFSET 0x14 #define MX5_USBOTHER_REGS_OFFSET 0x800