From 28250fab5bc1df3db950d4b9d900043f4dceb1d7 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Wed, 3 Feb 2010 08:59:29 -0500 Subject: [PATCH] mmp2: add handling on PMIC IRQ Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs to be cleared after PMIC IRQ occured. Now append the clear operation in irq chip handler. Signed-off-by: Haojian Zhuang --- arch/arm/mach-mmp/common.h | 1 + arch/arm/mach-mmp/irq-mmp2.c | 21 +++++++++++++++++++++ arch/arm/mach-mmp/mmp2.c | 10 ++++++++++ 3 files changed, 32 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index 18c037f..b4a0ba0 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h @@ -3,6 +3,7 @@ struct sys_timer; extern void timer_init(int irq); +extern void mmp2_clear_pmic_int(void); extern struct sys_timer pxa168_timer; extern struct sys_timer pxa910_timer; diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c index 3ae1c54..8cf9abf 100644 --- a/arch/arm/mach-mmp/irq-mmp2.c +++ b/arch/arm/mach-mmp/irq-mmp2.c @@ -92,6 +92,24 @@ SECOND_IRQ_CHIP(twsi, IRQ_MMP2_TWSI_BASE, MMP2_ICU_INT17); SECOND_IRQ_CHIP(misc, IRQ_MMP2_MISC_BASE, MMP2_ICU_INT35); SECOND_IRQ_CHIP(ssp, IRQ_MMP2_SSP_BASE, MMP2_ICU_INT51); +static void pmic_irq_demux2(unsigned int irq, struct irq_desc *desc) +{ + unsigned long status, mask, n; + mask = __raw_readl(MMP2_ICU_INT4_MASK); + while (1) { + status = __raw_readl(MMP2_ICU_INT4_STATUS) & ~mask; + if (status == 0) + break; + n = find_first_bit(&status, BITS_PER_LONG); + while (n < BITS_PER_LONG) { + generic_handle_irq(IRQ_MMP2_PMIC_BASE + n); + if ((IRQ_MMP2_PMIC_BASE + n) == IRQ_MMP2_PMIC) + mmp2_clear_pmic_int(); + n = find_next_bit(&status, BITS_PER_LONG, n + 1); + } + } +} + static void init_mux_irq(struct irq_chip *chip, int start, int num) { int irq; @@ -137,4 +155,7 @@ void __init mmp2_init_icu(void) set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); + + /* keep pmic_irq_demux() to avoid warning */ + set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux2); } diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 0f1c441..72eb9da 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c @@ -37,6 +37,16 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = { MFP_ADDR_END, }; +void mmp2_clear_pmic_int(void) +{ + unsigned long mfpr_pmic, data; + + mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; + data = __raw_readl(mfpr_pmic); + __raw_writel(data | (1 << 6), mfpr_pmic); + __raw_writel(data, mfpr_pmic); +} + static void __init mmp2_init_gpio(void) { int i; -- 1.5.6.5