hi,sir!<br><br>1:your memory card test is fine,it can indicate sdhc data communicate ok with sdio dma!<br>2:just use scope to test and know its clock,wifi clock is very strict,if clock is lower ,will <br>get some issue.if sdio clock bigger than 25M or very slower,will get some issue!<br>
3:no relation with your MCU DMA,just SDIO DMA!<br><br><div class="gmail_quote">2009/10/22 Sascha Hauer <span dir="ltr"><<a href="mailto:s.hauer@pengutronix.de">s.hauer@pengutronix.de</a>></span><br><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
<div class="im">On Wed, Oct 21, 2009 at 10:51:56PM +0200, Daniel Mack wrote:<br>
> Hi Dan,<br>
><br>
> On Wed, Oct 21, 2009 at 01:15:19PM -0700, Dan Williams wrote:<br>
> > On Wed, 2009-10-21 at 21:20 +0200, Daniel Mack wrote:<br>
> > > Hi,<br>
> > ><br>
> > > we're having trouble getting SDIO connected harware to fly on MX31 based<br>
> > > designs. In particular, a SD8686 chip supported by the libertas_sdio<br>
> > > driver will hang forever when built without CONFIG_MMC_DEBUG=y. With<br>
> > > that option selected, however, the behaviour is a little different, and<br>
> > > I can at least see the following messages on a recent 2.6.32-rc5 based<br>
> > > MX31 tree.<br>
> > ><br>
> > > Is there any common pitfall for such setups? I did more or less the same<br>
> > > thing on PXAs (same WLAN chip, same kind of interface, same firmware),<br>
> > > and haven't seen any such effects, so I suspect the MXC specific parts<br>
> > > to be the reason for that. Any ideas?<br>
> ><br>
> > Any idea what quirks your SDHC is using if any? Does it require PIO or<br>
> > can it do DMA?<br>
><br>
> In mainline kernels, DMA is limited to the MX2 SoC family. The MX3 that<br>
> I'm using is excluded from that feature, but I'mm not aware of the<br>
> reason for that.<br>
<br>
</div>The reason is that the i.MX31/35/25 have a so called Smart DMA engine<br>
(SDMA). So far nobody has been smart enough to clean the Freescale code<br>
up for mainline. The original DMA engine this driver works with is<br>
equipped with the i.MX1/21/27 processors.<br>
<br>
Sascha<br>
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