[PATCH] pwm: mtk-disp: Fix period readback

AngeloGioacchino Del Regno angelogioacchino.delregno at collabora.com
Tue Sep 8 00:14:54 PDT 2026


On 8/27/26 12:57, Chen-Yu Tsai wrote:
> The period value stored in the register is the number of clock cycles - 1.
> 
> Account for the offset when calculating the period in nanoseconds. This
> fixes the discrepancy reported by the pwm core when CONFIG_PWM_DEBUG=1:
> 
>      mediatek-disp-pwm 1100e000.pwm: .apply is not idempotent
>      	(ena=1 pol=0 281500/499875) -> (ena=1 pol=0 281500/499750)
> 
> Calculation discrepancy in the driver was found by AI run by a colleague
> while debugging another PWM related issue. Check against SoC datasheet
> and fix done by the author.
> 
> Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
> Cc: Jitao Shi <jitao.shi at mediatek.com>
> Signed-off-by: Chen-Yu Tsai <wenst at chromium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>




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