[PATCH] iommu/arm-smmu-v3-sva: Relax ASID requirements

[Jason Gunthorpe]

On Mon, Sep 07, 2026 at 03:49:28PM +0000, Mostafa Saleh wrote:
> arm_smmu_sva_supported() have some residual checks for ASID from the
> original commit d744f9e6c222 ("iommu/arm-smmu-v3: Check for SVA features")
> 
> As DVM was used for TLB invalidation and the ASID of the domain was shared
> with the CPU process.
> 
> However, the commit
> d38c28dbefee ("iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain")
> removed that support.
> 
> So matching the SMMU ASID space to the CPU is unnecessary and can be
> relaxed.
> 
> Remove the CPU ASID related code, and update the print for the SMMUv3.

It is OK, but maybe this could also be but under an if
ARM_SMMU_FEAT_BTM?  That is never enabled and is a placeholder to for
eventual BTM support.

Once we get the last part of the invs code the BTM support can come
back in.

Jasson