[PATCH v3 00/13] iommu/arm-smmu-v3: Add PRI support

[Jonathan Cameron]

Hi,

This is somewhat of a drive by review as I've been a bit snowed under
(blame the AI deluge if you like).  I'll try to come back to it but
don't wait on me.

Great to see this moving forward.

> The SMMUv3 driver doesn't handle events on the PRI queue or respond to IOPF
> faults. This series adds the missing pieces, using the IOPF infrastructure,
> to convert PRI page requests into iopf_faults and issue CMDQ_OP_PRI_RESP.
> 
> The iopf_queue_flush_dev() contract requires the driver to first drain the
> hardware PRI queue and synchronize using a threaded IRQ handler before the
> IOPF software flush. This drove the additional commits compared to v1:
>  - arm_smmu_drain_queue() drains the hardware queue by counting the
>    entries that the threaded IRQ handler consumes
>  - arm_smmu_attach_release() moves the teardown outside the global lock
>  - synchronize_irq() closes the gap before the final flush
> 
> Note that, although this series is only about PRIQ and EVTQ, the Q_POS and
> arm_smmu_drain_queue() helpers will be shared with Pranj's RPM series, per
> discussion below for CMDQ to use as well:
> https://lore.kernel.org/all/ao3ljjiXhnSJte5A@google.com/
> 
> Also, two patches in this series have some conflict with the kdump series:
> https://lore.kernel.org/all/cover.1788130528.git.nicolinc@nvidia.com/
> 
> As the kdump one is still under review, I leave those as-is, since Sashiko
> review relies on a clean rebase on linux-next to scan the series. Once the
> kdump series gets merged, I will rebase those kdump related stuff. For now,
> I think the series is good to collect review comments.
> 
> This is on Github:
> https://github.com/nicolinc/iommufd/commits/smmuv3_pri-v3
> 
> FWIW, engineers on the NVIDIA side have managed to verify the PRI feature.

I don't suppose you can share what they used to test?

Thanks,

Jonathan

-- 
Jonathan Cameron <jonathan.cameron at oss.qualcomm.com>