[PATCH v3 0/5] Add CIX Sky1 USB3/USBSSP support

[Krzysztof Kozlowski]

On 03/09/2026 04:35, Hongliang Yang wrote:
> Add USB3 PHY binding and driver, Cadence USBSSP glue binding and
> driver, and USB4/USB5 device tree nodes for the CIX Sky1 SoC.
> 
> This series adds support for the USB4 and USB5 controllers (based on
> Cadence USBSSP DRD) found on the CIX Sky1 SoC, along with their
> associated multi-port USB3 PHY.
> 
> The two wrapper nodes each carry two 4-byte register windows: these
> are per-controller RCSU control/status registers (AXI cache attribute
> and clock-status) that live inside the shared RCSU aperture, so they
> cannot be expressed as a syscon; the OTG mode straps live in the S5
> system control block and are referenced through the cix,usb-syscon
> phandle.  This was discussed during review of v1 [1].
> 
> Changes in v3:
> 

I do not see how you addressed my feedback from v1. I asked, not to
combine USB patches with other subsystems, within one patchset. These
are separate patchsets.

Best regards,
Krzysztof