[PATCH net-next v3 2/6] dt-bindings: net: xlnx,xxv-ethernet: Add Xilinx XXV 10G/25G Ethernet
Andrew Lunn
andrew at lunn.ch
Tue Sep 1 07:31:18 PDT 2026
On Tue, Sep 01, 2026 at 08:48:18AM +0530, Gupta, Suraj wrote:
>
>
> On 9/1/2026 7:57 AM, Andrew Lunn wrote:
> > > + The Xilinx XXV Ethernet Subsystem implements a 10G/25G Ethernet MAC with an
> > > + in-core PCS/PMA driving a high-speed serial transceiver. It supports the
> > > + 10GBASE-R and 25GBASE-R line rates, with 25G operation following the 25G
> > > + Ethernet Consortium specification. It has no external MDIO PHY
> >
> > What about MDIO bus?
> >
> > Andrew
>
> The 10G/25G (XXV) Ethernet Subsystem IP does not provide an MDIO master.
O.K. Please change the wording to make that clear. There are plenty to
10G PHYs available, but it seems like you do not consider that a use
case.
Has the MDIO bus master been replaced with I2C? I assume you intend
this device to be paired by an SFP cage, so an I2C bus will be
required. Is that a different IP which needs to be licensed?
> The contents of the appropriate MDIO registers are available in the IP control &
> status registers.
What does that mean?
Andrew
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