[PATCH v3 14/14] perf tests: Check CoreSight emulated instruction entry and exit

[Leo Yan]

Use traploop's EL0 read of ID_AA64ISAR0_EL1 to check an emulated
instruction. The kernel emulates MRS and advances the return PC by four
bytes.

Select MRS entries by instruction encoding and reuse the common FIFO
recorder and pair checker. An instruction page fault at MRS also matches
the opcode filter and returns to the same PC. Retry recordings when the
pair check fails or finds no complete pair, and fail after three
unsuccessful attempts. Recording and decoding errors fail immediately.

For example, an expected int/iret pair is:

  int            5cc808 => ffff800080010c00 insn: 00 06 38 d5
  ...
  iret ffff800080012284 =>           5cc80c insn: e0 03 9f d6

The entry instruction is MRS X0, ID_AA64ISAR0_EL1. After emulating the
read at 0x5cc808, the kernel returns via ERET to the next instruction at
0x5cc80c.

Reviewed-by: James Clark <james.clark at linaro.org>
Signed-off-by: Leo Yan <leo.yan at arm.com>
---
 .../perf/tests/shell/coresight/trap_entry_exit.sh  | 39 ++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/tools/perf/tests/shell/coresight/trap_entry_exit.sh b/tools/perf/tests/shell/coresight/trap_entry_exit.sh
new file mode 100755
index 0000000000000000000000000000000000000000..4521e4f4ba58100c7da7a915d729df7ad814f031
--- /dev/null
+++ b/tools/perf/tests/shell/coresight/trap_entry_exit.sh
@@ -0,0 +1,39 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0
+# CoreSight emulated instruction entry and exit (exclusive)
+
+. "$(dirname "$0")/../lib/coresight_exception.sh"
+
+test_trap_entry_exit()
+{
+	local attempt result
+
+	# traploop reads ID_AA64ISAR0_EL1 from EL0. The kernel emulates MRS and
+	# advances the saved PC, so IRET must resume four bytes after the trap.
+	for attempt in 1 2 3; do
+		echo "Recording emulated instructions (attempt $attempt/3)"
+		if ! record_trace traploop 256; then
+			cat "$tmpdir/record.log"
+			echo "Failed to record the traploop workload"
+			return 1
+		fi
+		decode_trace || return 1
+		# Select MRS Xt, ID_AA64ISAR0_EL1; the low five bits select Xt.
+		check_exception_pairs "int.*insn: [01][[:xdigit:]] 06 38 d5" "iret" 4
+		result=$?
+
+		# An instruction page fault at MRS can also match the opcode filter.
+		# Retry failed checks to tolerate such transient faults.
+		case $result in
+		0) return 0 ;;
+		1|2) continue ;;
+		*) return "$result" ;;
+		esac
+	done
+
+	echo "FAIL: No valid trap pair after three recordings"
+	return 1
+}
+
+setup_exception_test || exit $?
+test_trap_entry_exit

-- 
2.34.1