[PATCH 1/3] dt-bindings: display: bridge: document TH1520 MIPI DSI controller
Icenowy Zheng
zhengxingda at iscas.ac.cn
Fri Oct 30 00:47:49 PDT 2026
T-Head TH1520 SoC contains two DesignWare MIPI DSI host controllers.
Add a binding document for them, referencing the common dw-mipi-dsi
binding file.
Signed-off-by: Icenowy Zheng <zhengxingda at iscas.ac.cn>
---
.../display/bridge/thead,th1520-dw-mipi-dsi.yaml | 102 +++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/thead,th1520-dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/thead,th1520-dw-mipi-dsi.yaml
new file mode 100644
index 0000000000000..23c249f1c1b71
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/thead,th1520-dw-mipi-dsi.yaml
@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/thead,th1520-dw-mipi-dsi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: T-Head TH1520 DesignWare MIPI DSI Host Controller
+
+maintainers:
+ - Icenowy Zheng <zhengxingda at iscas.ac.cn>
+
+description:
+ The MIPI DSI host controller in TH1520 is a Synopsys DesignWare MIPI DSI
+ host controller paired with an integrated Synopsys MIPI D-PHY.
+
+allOf:
+ - $ref: snps,dw-mipi-dsi.yaml#
+
+properties:
+ compatible:
+ const: thead,th1520-dw-mipi-dsi
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: DSI controller APB clock
+ - description: PHY configuration clock
+ - description: PHY reference clock
+ - description: DSI controller input pixel clock gate
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: phy_cfg
+ - const: ref
+ - const: pixel
+
+ syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the VO subsystem system controller.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - interrupts
+ - syscon
+ - ports
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/thead,th1520-clk-ap.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/reset/thead,th1520-reset.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dsi0: dsi at ffef500000 {
+ compatible = "thead,th1520-dw-mipi-dsi";
+ reg = <0xff 0xef500000 0x0 0x1000>;
+ interrupts = <119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_vo CLK_MIPI_DSI0_PCLK>,
+ <&clk_vo CLK_MIPI_DSI0_CFG>,
+ <&clk_vo CLK_MIPI_DSI0_REFCLK>,
+ <&clk_vo CLK_MIPIDSI0_PIXCLK>;
+ clock-names = "pclk", "phy_cfg", "ref", "pixel";
+ resets = <&rst TH1520_RESET_ID_DSI0_APB>;
+ reset-names = "apb";
+ syscon = <&syscon_vo>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ dsi0_in: endpoint {
+ remote-endpoint = <&dpu_out_dpi0>;
+ };
+ };
+
+ dsi0_out_port: port at 1 {
+ reg = <1>;
+
+ dsi0_out_panel: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+ };
+ };
--
2.56.0
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