[RFC 02/12] arm64: Detect FEAT_TLBID
Linu Cherian
linu.cherian at arm.com
Thu Oct 29 21:59:48 PDT 2026
Hi,
On Thu, Oct 01, 2026 at 12:06:45PM +0100, Kristina Martšenko wrote:
> Detect if FEAT_TLBID is supported by the system. Detect TLBID
> configuration from TLBIDIDR_EL1. This information will be used in later
> patches.
>
> Set HFGRTR2_EL2.nTLBIDIDR_EL1 so that the kernel can access TLBIDIDR_EL1
> at EL1 (in case of nVHE/hVHE).
>
> Signed-off-by: Kristina Martšenko <kristina.martsenko at arm.com>
> ---
> arch/arm64/include/asm/cpu.h | 1 +
> arch/arm64/include/asm/cpufeature.h | 7 +++++++
> arch/arm64/include/asm/el2_setup.h | 9 ++++++++-
> arch/arm64/kernel/cpufeature.c | 25 +++++++++++++++++++++++++
> arch/arm64/kernel/cpuinfo.c | 3 +++
> arch/arm64/tools/cpucaps | 1 +
> 6 files changed, 45 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
> index 3c008821219c..967ccdedf526 100644
> --- a/arch/arm64/include/asm/cpu.h
> +++ b/arch/arm64/include/asm/cpu.h
> @@ -48,6 +48,7 @@ struct cpuinfo_arm64 {
> u64 reg_gmid;
> u64 reg_smidr;
> u64 reg_mpamidr;
> + u64 reg_tlbididr;
>
> u64 reg_id_aa64dfr0;
> u64 reg_id_aa64dfr1;
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 4f04ad82ea34..d4e7497143b2 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -627,6 +627,13 @@ static inline bool id_aa64pfr1_mpamfrac(u64 pfr1)
> return val > 0;
> }
>
> +static inline bool id_aa64mmfr4_tlbid(u64 mmfr4)
> +{
> + u32 val = cpuid_feature_extract_unsigned_field(mmfr4, ID_AA64MMFR4_EL1_TLBID_SHIFT);
> +
> + return val > 0;
> +}
> +
> void __init setup_boot_cpu_features(void);
> void __init setup_system_features(void);
> void __init setup_user_features(void);
> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> index aa8ec9df8024..bd70a470596c 100644
> --- a/arch/arm64/include/asm/el2_setup.h
> +++ b/arch/arm64/include/asm/el2_setup.h
> @@ -438,9 +438,16 @@
> orr x0, x0, #HDFGRTR2_EL2_nPMSDSFR_EL1
>
> .Lskip_spefds_\@:
> + mov x1, xzr
> + mrs_s x2, SYS_ID_AA64MMFR4_EL1
> + ubfx x2, x2, #ID_AA64MMFR4_EL1_TLBID_SHIFT, #ID_AA64MMFR4_EL1_TLBID_WIDTH
> + cbz x2, .Lskip_tlbid_\@
> + orr x1, x1, #HFGRTR2_EL2_nTLBIDIDR_EL1
> +
> +.Lskip_tlbid_\@:
> msr_s SYS_HDFGRTR2_EL2, x0
> msr_s SYS_HDFGWTR2_EL2, x0
> - msr_s SYS_HFGRTR2_EL2, xzr
> + msr_s SYS_HFGRTR2_EL2, x1
> msr_s SYS_HFGWTR2_EL2, xzr
> msr_s SYS_HFGITR2_EL2, xzr
> .Lskip_fgt2_\@:
IMO, would be good to move the above changes into a separate patch.
Thanks,
Linu Cherian.
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