[PATCH v10 16/16] ARM: dts: aspeed: anacapa: Rename FM_CPU0_PWRGD to host0-ready

[Colin Huang]

phosphor-state-manager uses the "host0-ready" GPIO line to determine
whether the host is running. The current "FM_CPU0_PWRGD" line name is
not recognized for this purpose.

Rename the GPIO line to "host0-ready" so that phosphor-state-manager
can correctly determine the host state.

Signed-off-by: Colin Huang <u8813345 at gmail.com>
---
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi  | 2 +-
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dtsi | 2 +-
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi
index 698308049c38..3685d47fb6f0 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi
@@ -250,7 +250,7 @@ &sgpiom0 {
 	/* P0-P7 line 240-255 */
 	"CPU0_SLP_S5_N_R", "NFC_VEN",
 	"CPU0_SLP_S3_N_R", "",
-	"FM_CPU0_PWRGD", "",
+	"host0-ready", "",
 	"PWRGD_RMC", "",
 	"FM_RST_CPU0_RESET_N", "RBB_CPLD_RISCV_RST",
 	"FM_PWRGD_CPU0_PWROK", "LBB_CPLD_RISCV_RST",
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dtsi
index 7745802d3640..6a526a7de2a3 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dtsi
@@ -1084,7 +1084,7 @@ &sgpiom0 {
 	/* P0-P7 line 240-255 */
 	"CPU0_SLP_S5_N_R", "NFC_VEN",
 	"CPU0_SLP_S3_N_R", "",
-	"FM_CPU0_PWRGD", "",
+	"host0-ready", "",
 	"PWRGD_RMC", "",
 	"FM_RST_CPU0_RESET_N", "",
 	"FM_PWRGD_CPU0_PWROK", "",
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi
index 766aa26b6cea..f14985883291 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi
@@ -458,7 +458,7 @@ &sgpiom0 {
 	/* P0-P7 line 240-255 */
 	"CPU0_SLP_S5_N_R", "NFC_VEN",
 	"CPU0_SLP_S3_N_R", "",
-	"FM_CPU0_PWRGD", "",
+	"host0-ready", "",
 	"PWRGD_RMC", "",
 	"FM_RST_CPU0_RESET_N", "RBB_CPLD_RISCV_RST",
 	"FM_PWRGD_CPU0_PWROK", "LBB_CPLD_RISCV_RST",

-- 
2.34.1