[PATCH/DNI 9/9] arm64: dts: renesas: ironhide: Enable CAN-FD

[Geert Uytterhoeven]

CAN-FD channels 1 to 6 and 12 to 15 are wired to CAN connectors CN7B to
CN12, CN18, CN19, and CN55 to CN58.

Channel 0 on CAN connector CN7A is not added, as its transceiver is
controlled by the System Control Processor (SCP).

Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
---
This depends on out-of-tree pin control support.
---
 .../boot/dts/renesas/r8a78000-ironhide.dts    | 117 +++++++++++++++++-
 1 file changed, 116 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts b/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
index c2d814da9fd97802..63dd4fa2d737a729 100644
--- a/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
+++ b/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
@@ -171,6 +171,66 @@ ecc at 1ecccc0000 {
 	};
 };
 
+&can_clk {
+	clock-frequency = <40000000>;
+};
+
+&canfd0 {
+	pinctrl-0 = <&canfd1_pins>,  <&canfd2_pins>, <&canfd3_pins>,
+		    <&canfd4_pins>, <&canfd5_pins>, <&canfd6_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	channel1 {
+		status = "okay";
+	};
+
+	channel2 {
+		status = "okay";
+	};
+
+	channel3 {
+		status = "okay";
+	};
+
+	channel4 {
+		status = "okay";
+	};
+
+	channel5 {
+		status = "okay";
+	};
+
+	channel6 {
+		status = "okay";
+	};
+};
+
+&canfd1 {
+	pinctrl-0 = <&canfd12_pins>, <&canfd13_pins>,  <&canfd14_pins>,
+		    <&canfd15_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	channel4 {
+		status = "okay";
+	};
+
+	channel5 {
+		status = "okay";
+	};
+
+	channel6 {
+		status = "okay";
+	};
+
+	channel7 {
+		status = "okay";
+	};
+};
+
 &extal_clk {
 	clock-frequency = <16666600>;
 };
@@ -214,9 +274,64 @@ &msiof6 {
 };
 
 &pfc {
-	pinctrl-0 = <&scif_clk_pins>;
+	pinctrl-0 = <&can_clk_pins>, <&scif_clk_pins>;
 	pinctrl-names = "default";
 
+	can_clk_pins: can-clk {
+		groups = "can_clk";
+		function = "can_clk";
+	};
+
+	canfd1_pins: canfd1 {
+		groups = "canfd1_data";
+		function = "canfd1";
+	};
+
+	canfd2_pins: canfd2 {
+		groups = "canfd2_data";
+		function = "canfd2";
+	};
+
+	canfd3_pins: canfd3 {
+		groups = "canfd3_data";
+		function = "canfd3";
+	};
+
+	canfd4_pins: canfd4 {
+		groups = "canfd4_data";
+		function = "canfd4";
+	};
+
+	canfd5_pins: canfd5 {
+		groups = "canfd5_data";
+		function = "canfd5";
+	};
+
+	canfd6_pins: canfd6 {
+		groups = "canfd6_data";
+		function = "canfd6";
+	};
+
+	canfd12_pins: canfd12 {
+		groups = "canfd12_data_b";
+		function = "canfd12";
+	};
+
+	canfd13_pins: canfd13 {
+		groups = "canfd13_data_b";
+		function = "canfd13";
+	};
+
+	canfd14_pins: canfd14 {
+		groups = "canfd14_data_b";
+		function = "canfd14";
+	};
+
+	canfd15_pins: canfd15 {
+		groups = "canfd15_data_b";
+		function = "canfd15";
+	};
+
 	hscif0_pins: hscif0 {
 		groups = "hscif0_data", "hscif0_ctrl";
 		function = "hscif0";
-- 
2.43.0