[PATCH v6 6/8] clk: sunxi-ng: a733: Add mod clocks support

[Vinicius Pedrosa]

Hi Junhui,

In patch 6/8, usb2-u2-ref is declared as a plain mux, but the manual
has a gate at bit 31 of 0x1348, and its reset value is 0. So the CCU
driver can't enable it.

-static SUNXI_CCU_MUX_DATA(usb2_u2_ref_clk, "usb2-u2-ref", usb01_ref_parents, 0x1348, 24, 3, 0);
+static SUNXI_CCU_MUX_DATA_WITH_GATE(usb2_u2_ref_clk, "usb2-u2-ref", usb01_ref_parents,
+                                    0x1348, 24, 3, BIT(31), 0);

I hit this on my Cubie A7Z with a USB stick on the DWC3 port (the DT
and the USB2 PHY driver for that port are local, not posted):

- v6 as posted: 0x02003348 stays 0 and the DWC3 soft reset times out
  (-110), 4/4 boots, one of them cold.
- same kernel, only bit 31 set from U-Boot: the host works, 3/3.
- with the change above: works, 3/3.

Same DTB and initramfs in every run. The SerDes gates were also the
same, so I haven't checked whether they matter on their own.

My boot chain (U-Boot SPL, TF-A, U-Boot) leaves bit 31 clear. I don't
know what the vendor one does.

Thanks,
Vinicius