[PATCH 3/6] dt-bindings: mailbox: Add AMD PL Mailbox IP

[Ben Levinsky]

On 10/20/26 5:18 AM, Krzysztof Kozlowski wrote:
> On 16/10/2026 16:11, Shah, Tanmay wrote:
>>
>>
>> On 10/16/2026 8:59 AM, Krzysztof Kozlowski wrote:
>>> On 15/10/2026 17:31, Shah, Tanmay wrote:
>>>> We use 'amd' vendor prefix for all new drivers & bindings. Also, there
>>>> is dedicated IPI hardware which can be used as mailbox too, and we
>>>> should distinguish it with this PL mailbox. So I that is included in the
>>>> compatible string. (pl-mbox).
>>>>
>>>> If we are also to include SOC name as well (per compatible property
>>>> guideline), then we should include one of the SOC name as well:
>>>>
>>>> So, I think 'amd,zynqmp-pl-mbox-2.1' is good.
>>>>
>>>> Krzysztof, are you okay with above name? The 2.1 is FPGA IP design
>>>> version number and not the SOC version number. So in future let's say
>>>> that FPGA IP design is improved then the name (pl-mbox) will remain
>>>> same, but only version number will be updated i.e. (from 2.1 to 3.0). Is
>>>> it okay if we explicitly mention this in the binding description?
>>>
>>> So you will release the same SoC with different versions of the block?
>>>
>>
>> Yes correct.
> 
> Well, then this does not look like SoC block at all.
> 

  Hi Krzysztof,

  Right, it is not a SoC block. The Mailbox is a soft IP core from the AMD
  IP catalog (Mailbox v2.1) that is instantiated in programmable logic ("PL" acronym), so
  the IP version, not the SoC, defines the programming model.

  Following the other PL soft IP bindings, which use a single IP-versioned
  compatible without a SoC name (e.g. xlnx,tmr-manager-1.0,
  xlnx,axi-can-1.00.a), v2 would use:

    compatible = "amd,pl-mailbox-2.1";

  with the driver matching only that compatible. The amd prefix follows
  what we use for new AMD bindings, and "pl" distinguishes it from the IPI
  mailbox hardware. Is that acceptable?

  Thanks,
  Ben

> Best regards,
> Krzysztof