[PATCH 3/3] clk: meson: s4: fix ENCP clock selection

[Chuan Liu]

Hi Carlo,
     Thanks for the fix.

On 10/23/2026 4:10 AM, Carlo Caione wrote:
> [????????? ccaione at baylibre.com ????????? https://aka.ms/LearnAboutSenderIdentification?????????????]
> 
> [ EXTERNAL EMAIL ]
> 
> The ENCP clock uses ENCT's settings by mistake. Change the selector
> from bits [23:20] to [27:24].

Yes, you are right.

By the way, S4 does not support the ENCT (Encoder for TV Panel) so the 
driver does not define the associated clocks.

> 
> See the S905Y4 datasheet v0.7, Table 7-58.
> 
> Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
> Signed-off-by: Carlo Caione <ccaione at baylibre.com>

Reviewed-by: Chuan Liu <chuan.liu at amlogic.com>

> ---
>   drivers/clk/meson/s4-peripherals.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
> index ba41fcd90588..33573eb85927 100644
> --- a/drivers/clk/meson/s4-peripherals.c
> +++ b/drivers/clk/meson/s4-peripherals.c
> @@ -1114,7 +1114,7 @@ static struct clk_regmap s4_cts_encp_sel = {
>          .data = &(struct clk_regmap_mux_data){
>                  .offset = CLKCTRL_VID_CLK_DIV,
>                  .mask = 0xf,
> -               .shift = 20,
> +               .shift = 24,
>                  .table = s4_cts_parents_val_table,
>          },
>          .hw.init = &(struct clk_init_data){
> 
> --
> 2.56.0
> 
> 
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-- 
Best regards,
Chuan