[PATCH 1/4] arm64: dts: amlogic: s7: fix the GIC CPU interface region size

[Carlo Caione]

The CPU interface of the GIC-400 spans 8 KiB, but the S7 device tree
describes only its first 256 bytes. The GIC driver then disables the
split priority drop and deactivation mode, which needs the GICC_DIR
register in the second 4 KiB page, and warns at boot:

  [    0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set

Describe the whole 8 KiB region, as the other Amlogic SoCs with a
GIC-400 at the same address do.

Fixes: 1b753fcfcff8 ("arm64: dts: add support for S7 based Amlogic BP201")
Signed-off-by: Carlo Caione <ccaione at baylibre.com>
---
 arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
index 64440df4f542..89b75bec40f0 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
@@ -121,7 +121,7 @@ gic: interrupt-controller at fff01000 {
 			#address-cells = <0>;
 			interrupt-controller;
 			reg = <0x0 0xfff01000 0 0x1000>,
-			      <0x0 0xfff02000 0 0x0100>;
+			      <0x0 0xfff02000 0 0x2000>;
 			interrupts = <GIC_PPI 9 0xf04>;
 		};
 

-- 
2.56.0