[PATCH 1/2] arm64: dts: imx8qm-mek: Re-enable A72 cluster after ERR050104 workaround

Peng Fan (OSS) peng.fan at oss.nxp.com
Wed Oct 21 18:50:01 PDT 2026


From: Peng Fan <peng.fan at nxp.com>

The ERR050104 cache coherency workaround for i.MX8QM/8QP has been
merged upstream (d44e08dab27d). The workaround addresses the incorrect
wiring of upper address bits in the A53 subsystem that corrupts TLBI and
IC maintenance operations between A53 and A72 clusters.

Previously the A72 CPUs (cpu at 100, cpu at 101), the cpu-map, and the
cpu1-thermal zone were removed from the MEK board DT to avoid incorrect
cross-cluster coherency maintenance. With the software workaround in place,
restore all deleted nodes.

Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 9e49ac377162b..af212fa194cf7 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -17,16 +17,6 @@ chosen {
 		stdout-path = &lpuart0;
 	};
 
-	cpus {
-		/delete-node/ cpu-map;
-		/delete-node/ cpu at 100;
-		/delete-node/ cpu at 101;
-	};
-
-	thermal-zones {
-		/delete-node/ cpu1-thermal;
-	};
-
 	memory at 80000000 {
 		device_type = "memory";
 		reg = <0x00000000 0x80000000 0 0x40000000>;

-- 
2.34.1




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