[PATCH v4 2/2] cache: add SMCCC-backed cache invalidate provider

Srirangan Madhavan smadhavan at nvidia.com
Wed Oct 21 16:12:28 PDT 2026


On 10/15/26 11:30 AM, Jonathan Cameron wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Tue, 13 Oct 2026 07:02:05 +0000
> Srirangan Madhavan <smadhavan at nvidia.com> wrote:
> 
>> Add a cache maintenance provider for the cache clean+invalidate interface
>> defined by Arm DEN0028 v1.7.
>>
>> Register the interface attributes function as an SMCCC device and bind the
>> provider through the SMCCC bus. The provider reads the firmware attributes
>> during probe and serializes cache maintenance calls. It handles transient
>> BUSY and RATE_LIMITED responses with bounded retries. It also registers
>> with the generic cache coherency framework used by memregion callers.
>>
>> Signed-off-by: Srirangan Madhavan <smadhavan at nvidia.com>
> 
> I'm fine with the changes to put it on the bus and Andre's suggestion to drop
> the latency value handling. So with that done
> 
> Reviewed-by: Jonathan Cameron <jonathan.cameron at oss.qualcomm.com>
> 
> I'd probably not have bothered with the mutex_destroy() given limited
> utility vs code added (I mind that less if devm is appropriate, but doing
> that here would be messy).  If we ever see a use of that after the destroy
> then something exceedingly weird is going on!
> 
> Anyhow, doesn't really matter either way.
> 
> Jonathan

Thanks, Jonathan.
The latency handling has been removed in v5 and I have added your 
Reviewed-by tag.
I left mutex_destroy() in place as it is a harmless cleanup.

-- 
Regards,
Srirangan



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