[PATCH 5/6] ARM: dts: broadcom: Enable SATA on BCM958625HR

[Florian Fainelli]

Commit 77416ab35f57 ("ARM: dts: NSP: Disable AHCI controller for HR NSP
boards") disabled AHCI after reports of boot hangs. Both SATA PHYs
remain enabled, but the disabled controller leaves the eSATA ports
unavailable.

With explicit IDM clock/reset setup and the corrected shared PHY
register aperture in place, enable the controller on BCM958625HR.

This enablement has been build and schema checked. Cold-boot and eSATA
I/O validation on HR hardware are still required to establish whether
the original hang is resolved.

Signed-off-by: Florian Fainelli <florian.fainelli at broadcom.com>
---
 arch/arm/boot/dts/broadcom/bcm958625hr.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/broadcom/bcm958625hr.dts b/arch/arm/boot/dts/broadcom/bcm958625hr.dts
index a9b6aa04d573..3e86f3c2593a 100644
--- a/arch/arm/boot/dts/broadcom/bcm958625hr.dts
+++ b/arch/arm/boot/dts/broadcom/bcm958625hr.dts
@@ -182,6 +182,10 @@ partition at 700000 {
 	};
 };
 
+&sata {
+	status = "okay";
+};
+
 &sata_phy0 {
 	status = "okay";
 };
-- 
2.53.0