[PATCH 0/3] ARM/arm64: dts: imx: Fix stale board level PCIe Root Port nodes

[Sherry Sun (OSS)]

Commits 9dc39532172c ("ARM: dts: imx6qdl: Add Root Port node and PERST
property"), 37f53f50b36f ("arm64: dts: imx8mm: Add Root Port node and
PERST property") and 396fbe9a028d ("arm64: dts: imx8mp: Add Root Port
node and PERST property") added a Root Port node pcie at 0 to the SoC
level host bridge. However, several boards already described the Root
Port in their board DT under a different node name:
  ZII RDU2 (imx6q/imx6qp):               host at 0
  GE B450v3/B650v3/B850v3 (imx6q):       root at 0,0 (label pci_root)
  Gateworks Venice (imx8mm/imx8mp):      pcie at 0,0
  SolidRun HummingBoard Pulse (imx8mp):  root at 0,0

As a result, two Root Port nodes with devfn 0 now exist under the same
host bridge. of_pci_find_child_device() returns the first match, which
is the SoC level pcie at 0 node, so the board level Root Port node and all
of its children (on-board Ethernet controllers, PCIe switches, etc.)
are no longer associated with any PCI device.

This series fixes the issue by moving the children of the board level
Root Port nodes under &pcie_port0/&pcie0_port0 and dropping the
duplicated board level nodes. All existing labels and aliases (i210,
switch_nic, eth1, pcie_eth, ethernet1) are preserved, so phandle
references such as the DSA "ethernet = <&switch_nic>" keep working.
The moved nodes now sit on the Root Port's secondary bus, so the bus
number in reg and the unit addresses of the first level children are
updated to match. The kernel matches nodes to devices by devfn only,
so this does not change which node a device gets.

Request for bootloader owners:
This series changes the full DT path of the affected nodes. If the
bootloader (barebox / U-Boot) finds the node to fix up (e.g. to write
local-mac-address) by a hard-coded full path, rather than by an alias,
a label or by walking the PCI hierarchy, it will no longer find the
node and the MAC fixup will silently stop working.

The node path changes are:
  ZII RDU2:
    /soc/pcie at 1ffc000/host at 0/i210 at 0
 -> /soc/pcie at 1ffc000/pcie at 0/i210 at 0
  GE B450v3/B650v3:
    /soc/pcie at 1ffc000/root at 0,0/ethernet at 3,0
 -> /soc/pcie at 1ffc000/pcie at 0/ethernet at 0,0
  GE B850v3:
    /soc/pcie at 1ffc000/root at 0,0/bridge at 1,0/bridge at 2,{1,2}/ethernet@{3,4},0
 -> /soc/pcie at 1ffc000/pcie at 0/bridge at 0,0/bridge at 2,{1,2}/ethernet@{3,4},0
  Gateworks GW72xx/GW73xx/GW82xx (imx8mm/imx8mp):
    /soc at 0/pcie at 33800000/pcie at 0,0/pcie at 0,0/pcie at N,0/ethernet at 0,0
 -> /soc at 0/pcie at 33800000/pcie at 0/pcie at 0,0/pcie at N,0/ethernet at 0,0
    (N = 3 on GW72xx, 4 on GW73xx, 7 on GW82xx)
  Gateworks GW7902:
    /soc at 0/pcie at 33800000/pcie at 0,0/ethernet at 0,0
 -> /soc at 0/pcie at 33800000/pcie at 0/ethernet at 0,0
  SolidRun HummingBoard Pulse:
    /soc at 0/pcie at 33800000/root at 0,0/ethernet at 1,0
 -> /soc at 0/pcie at 33800000/pcie at 0/ethernet at 0,0

Note that the ZII RDU2 i210 node has no alias in the kernel DT, so
the barebox fixup on that board is the most likely to rely on a full
path.

Ahmad, could you please confirm how barebox finds the i210 node on
ZII RDU2 to fix up the MAC address? If it uses a hard-coded path,
barebox needs to be updated to the new path above.

Likewise, Gateworks and SolidRun folks, please check whether your
U-Boot / barebox fixups (e.g. for ethernet1) depend on the node path.

Not tested on hardware, since I don't have access to these boards.
Tested-by from board owners would be very much appreciated.

Reported-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
Closes: https://lore.kernel.org/all/171421fb-d0a6-4e3f-b2dc-226e9c548972@pengutronix.de/
Signed-off-by: Sherry Sun <sherry.sun at nxp.com>
---
Sherry Sun (3):
      ARM: dts: imx6qdl: Move board Root Port children under &pcie_port0
      arm64: dts: imx8mm-venice: Move board Root Port children under &pcie0_port0
      arm64: dts: imx8mp: Move board Root Port children under &pcie0_port0

 arch/arm/boot/dts/nxp/imx/imx6q-b450v3.dts         |  4 ++--
 arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dts         |  4 ++--
 arch/arm/boot/dts/nxp/imx/imx6q-b850v3.dts         |  4 ++--
 arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi        | 11 -----------
 arch/arm/boot/dts/nxp/imx/imx6qdl-zii-rdu2.dtsi    | 13 ++++---------
 .../boot/dts/freescale/imx8mm-venice-gw72xx.dtsi   | 22 ++++++++--------------
 .../boot/dts/freescale/imx8mm-venice-gw73xx.dtsi   | 22 ++++++++--------------
 .../boot/dts/freescale/imx8mm-venice-gw7902.dts    | 16 +++++-----------
 .../dts/freescale/imx8mp-hummingboard-pulse.dts    | 17 ++++++-----------
 .../boot/dts/freescale/imx8mp-venice-gw72xx.dtsi   | 22 ++++++++--------------
 .../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi   | 22 ++++++++--------------
 .../boot/dts/freescale/imx8mp-venice-gw82xx.dtsi   | 22 ++++++++--------------
 12 files changed, 61 insertions(+), 118 deletions(-)
---
base-commit: 8f7df005a7564bd7ffa75da9c3085d5b996f1e16
change-id: 20261021-imx-pcie-rp-stale-nodes-e4634fe66020

Best regards,
-- 
Sherry Sun <sherry.sun at nxp.com>