[PATCH v3 03/11] dt-bindings: gpio: Add Cortina Systems CS7542 GPIO controller
Rob Herring (Arm)
robh at kernel.org
Tue Oct 20 11:30:02 PDT 2026
On Tue, 13 Oct 2026 09:07:13 +0300, Fil Dunsky wrote:
> The Cortina Systems CS75xx SoCs have five banks of 32 GPIO lines. Each
> pin is shared between a GPIO line and a peripheral function, selected by
> the bank's GPIO_MUX register in the global control block, which is
> described as the second register region of the bank.
>
> Signed-off-by: Fil Dunsky <filipp.dunsky at gmail.com>
> ---
> .../bindings/gpio/cortina,cs7542-gpio.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh at kernel.org>
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