[PATCH 0/3] Subject: [PATCH 0/3] clk: stm32mp1: add I2S_CKIN as PLL4 source and keep boot-enabled clocks running

Gabriel Fernandez gabriel.fernandez at foss.st.com
Tue Oct 20 02:48:52 PDT 2026


This series contains three small, independent improvements to the
STM32MP15 clock driver:

 - Patch 1 adds I2S_CKIN to the possible PLL4 reference clocks
   (PLL4SRC = 3).

 - Patch 2 makes pll_disable() keep PLLON set while one of the DIVPEN,
   DIVQEN or DIVREN bits is set. A P/Q/R output enabled by an earlier
   boot stage and not yet claimed by its consumer is unknown to the
   clock framework. Enabling and then disabling another output of the
   same PLL would otherwise switch the PLL off and cut that output.

- Patch 3 adds CLK_IGNORE_UNUSED to ck_trace, as already done for
   ck_sys_dbg, so that a trace session set up by the bootloader or a
   debugger is not stopped at the end of the boot.
   

Signed-off-by: Gabriel Fernandez <gabriel.fernandez at foss.st.com>
---
Antonio Borneo (1):
      clk: stm32mp1: don't disable the ck_trace clock when unused

Gabriel Fernandez (2):
      clk: stm32mp1: add i2s_ckin as a clock source of PLL4
      clk: stm32mp1: don't disable a PLL while its P/Q/R outputs are enabled

 drivers/clk/stm32/clk-stm32mp1.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)
---
base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a
change-id: 20261020-ups_mp15_clk_update-5e5900c0aaa1

Best regards,
-- 
Gabriel Fernandez <gabriel.fernandez at foss.st.com>




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