[PATCH v4 5/7] arm64: dts: ti: k3-j784s4-ti-ipc-firmware: Reserve memory for LPM metadata

[Richard GENOUD]

Le 17/10/2026 à 09:05, Kumar, Udit a écrit :
> 
> 
> On 9/21/2026 8:23 PM, Richard Genoud (TI) wrote:
>> Declare a carveout memory region to store LPM metadata on J784S4.
>>
>> For Jacinto devices, this memory region is needed for saving ATF context
>> and the certificate information of ATF and OPTEE and DM image. This LPM
>> metadata area is firewalled to be accessed only by TIFS.
>>
>> U-Boot R5 SPL/TIFS will use this area to save and restore:
>> - ATF context
>> - ATF certificate information
>> - OPTEE certificate information
>> - DM image (which has been copied in memory at boot time by U-Boot
>>    R5-SPL)
>>
>> At resume, U-Boot R5 SPL is executed and detects that the board is
>> resuming (with a flag set in the PMIC), then it:
>> - brings out of retention the DDR
>> - retrieves the LPM memory region from DTS
>> - authenticates certificates from LPM memory region and applies firewalls
>> - asks TIFS to restore TFA and its own minimal context
>> - starts TFA on remote proc
>> - loads back DM image from memory and jumps to DM
>>
>> https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#lpm-msg-lpm-save-addr
>>
>> As this is used by U-Boot SPL, bootph-pre-ram is added and the device is
>> enabled.
>>
>> NB: This memory region is not part of DM memory (which is not retained
>> at suspend)
>>
>> Signed-off-by: Prasanth Babu Mantena <p-mantena at ti.com>
>> Signed-off-by: Richard Genoud (TI) <richard.genoud at bootlin.com>
>> ---
>>   .../boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi    | 15 +++++++++++++++
>>   1 file changed, 15 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
>> index 81b508b9b05e..1c0c1533f0a3 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi
>> @@ -17,6 +17,12 @@ c71_3_memory_region: memory at ab100000 {
>>   		reg = <0x00 0xab100000 0x00 0xf00000>;
>>   		no-map;
>>   	};
>> +
>> +	lpm_memory_region: memory at ac000000 {
>> +		reg = <0x00 0xac000000 0x00 0x00300000>;
>> +		no-map;
>> +		bootph-pre-ram;
>> +	};
> 
> Could you move this carveout near to optee
> 0x9E500000 to 0x9E800000 as LPM memory,
> 
> Since 0xa***_**** is used by firmware and this is just place-holder for
> lpm meta data.
> 
> Also better to move this k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> file as these two SOCs are same and uses same map
Ok I'll change to 0x9E500000 and merge with patch 7/7 (j742s2)

Thanks!
Regards,
Richard

> 
> Thanks
> Udit
> 
> 
>>   };
>>   
>>   &mailbox0_cluster5 {
>> @@ -27,6 +33,15 @@ mbox_c71_3: mbox-c71-3 {
>>   	};
>>   };
>>   
>> +&mcu_r5fss0_core0 {
>> +	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
>> +			<&mcu_r5fss0_core0_memory_region>,
>> +			<&lpm_memory_region>;
>> +	memory-region-names = "dma", "firmware", "lpm-metadata";
>> +	bootph-pre-ram;
>> +	status = "okay";
>> +};
>> +
>>   &c71_3 {
>>   	mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
>>   	memory-region = <&c71_3_dma_memory_region>,
> 


-- 
Richard Genoud, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com