[PATCH net-next v3 8/9] net: stmmac: qcom-ethqos: add per-platform NOC clock voting
Mohd Ayaan Anwar
mohd.anwar at oss.qualcomm.com
Sat Oct 17 02:45:19 PDT 2026
Some SoCs gate the EMAC DMA path behind dedicated AXI clocks. Add
per-platform clock-name lists and configure them as a single
multi-clock OPP. The OPP core programs every clock rate and propagates
the required power state.
Select PM_OPP because DWMAC_QCOM_ETHQOS calls PM OPP APIs for
compatibles that describe AXI OPP clocks.
No functional change for existing compatibles. This will help us when
we add support for Shikra.
Signed-off-by: Mohd Ayaan Anwar <mohd.anwar at oss.qualcomm.com>
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
.../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 104 +++++++++++++++++++++
2 files changed, 105 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index ab3c4cf964239d724945651f7f7b5448118ad5f3..c86fbe2680ad46b6d444c1469b90872dff9b26b4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -146,6 +146,7 @@ config DWMAC_QCOM_ETHQOS
tristate "Qualcomm ETHQOS support"
default ARCH_QCOM
depends on OF && (ARCH_QCOM || COMPILE_TEST)
+ select PM_OPP
help
Support for the Qualcomm ETHQOS core.
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 370eb05caabc00a20d887ac88c1ffa4473bc4021..9c602755532e141f4b822721686b1481b29b7d4c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -7,6 +7,7 @@
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/phy/phy.h>
+#include <linux/pm_opp.h>
#include "stmmac.h"
#include "stmmac_platform.h"
@@ -98,6 +99,8 @@ struct ethqos_emac_driver_data {
const char *link_clk_name;
const struct dwmac4_addrs *dwmac4_addrs;
bool needs_sgmii_loopback;
+ const char * const *noc_clk_names;
+ unsigned int num_noc_clks;
};
struct qcom_ethqos {
@@ -112,6 +115,9 @@ struct qcom_ethqos {
bool rgmii_config_loopback_en;
bool has_emac_ge_3;
bool needs_sgmii_loopback;
+
+ struct clk_bulk_data *noc_clks;
+ unsigned int num_noc_clks;
};
static u32 rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset)
@@ -673,18 +679,61 @@ static int ethqos_mac_finish_serdes(struct net_device *ndev, void *priv,
return ret;
}
+static int qcom_ethqos_set_opp(struct qcom_ethqos *ethqos)
+{
+ struct device *dev = ðqos->pdev->dev;
+ unsigned long freq = ULONG_MAX;
+ struct dev_pm_opp *opp;
+ int ret;
+
+ opp = dev_pm_opp_find_freq_floor_indexed(dev, &freq, 0);
+ if (IS_ERR(opp)) {
+ ret = PTR_ERR(opp);
+ dev_err(dev, "Failed to find AXI NOC OPP: %d\n", ret);
+ return ret;
+ }
+
+ ret = dev_pm_opp_set_opp(dev, opp);
+ dev_pm_opp_put(opp);
+
+ return ret;
+}
+
static int ethqos_clks_config(void *priv, bool enabled)
{
struct qcom_ethqos *ethqos = priv;
int ret = 0;
if (enabled) {
+ if (ethqos->num_noc_clks) {
+ ret = qcom_ethqos_set_opp(ethqos);
+ if (ret) {
+ dev_err(ðqos->pdev->dev,
+ "NOC OPP set failed: %d\n", ret);
+ return ret;
+ }
+ }
+
ret = clk_prepare_enable(ethqos->link_clk);
if (ret) {
dev_err(ðqos->pdev->dev, "link_clk enable failed\n");
+ if (ethqos->num_noc_clks)
+ dev_pm_opp_set_rate(ðqos->pdev->dev, 0);
return ret;
}
+ if (ethqos->num_noc_clks) {
+ ret = clk_bulk_prepare_enable(ethqos->num_noc_clks,
+ ethqos->noc_clks);
+ if (ret) {
+ dev_err(ðqos->pdev->dev,
+ "NOC clocks enable failed: %d\n", ret);
+ clk_disable_unprepare(ethqos->link_clk);
+ dev_pm_opp_set_rate(ðqos->pdev->dev, 0);
+ return ret;
+ }
+ }
+
/* Enable functional clock to prevent DMA reset to timeout due
* to lacking PHY clock after the hardware block has been power
* cycled. The actual configuration will be adjusted once
@@ -693,7 +742,12 @@ static int ethqos_clks_config(void *priv, bool enabled)
qcom_ethqos_set_sgmii_loopback(ethqos, true);
ethqos_set_func_clk_en(ethqos);
} else {
+ if (ethqos->num_noc_clks)
+ clk_bulk_disable_unprepare(ethqos->num_noc_clks,
+ ethqos->noc_clks);
clk_disable_unprepare(ethqos->link_clk);
+ if (ethqos->num_noc_clks)
+ dev_pm_opp_set_rate(ðqos->pdev->dev, 0);
}
return ret;
@@ -721,6 +775,52 @@ static void ethqos_ptp_clk_freq_config(struct stmmac_priv *priv)
netdev_dbg(priv->dev, "PTP rate %lu\n", plat_dat->clk_ptp_rate);
}
+static void qcom_ethqos_noc_opp_cleanup(void *dev)
+{
+ dev_pm_opp_set_rate(dev, 0);
+}
+
+/* Some SoCs gate NOC access behind dedicated clocks. Acquire them here
+ * and set up an OPP table to vote for the required rate and power.
+ */
+static int qcom_ethqos_init_noc_clks(struct qcom_ethqos *ethqos,
+ const struct ethqos_emac_driver_data *data)
+{
+ struct dev_pm_opp_config config = {
+ .clk_names = data->noc_clk_names,
+ .config_clks = dev_pm_opp_config_clks_simple,
+ };
+ struct device *dev = ðqos->pdev->dev;
+ unsigned int i;
+ int ret;
+
+ if (!data->num_noc_clks)
+ return 0;
+
+ ethqos->noc_clks = devm_kcalloc(dev, data->num_noc_clks,
+ sizeof(*ethqos->noc_clks), GFP_KERNEL);
+ if (!ethqos->noc_clks)
+ return -ENOMEM;
+
+ for (i = 0; i < data->num_noc_clks; i++)
+ ethqos->noc_clks[i].id = data->noc_clk_names[i];
+ ethqos->num_noc_clks = data->num_noc_clks;
+
+ ret = devm_clk_bulk_get(dev, ethqos->num_noc_clks, ethqos->noc_clks);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get NOC clocks\n");
+
+ ret = devm_pm_opp_set_config(dev, &config);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to configure OPP clocks\n");
+
+ ret = devm_pm_opp_of_add_table(dev);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to add OPP table\n");
+
+ return devm_add_action_or_reset(dev, qcom_ethqos_noc_opp_cleanup, dev);
+}
+
static int qcom_ethqos_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -782,6 +882,10 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
ethqos->has_emac_ge_3 = data->has_emac_ge_3;
ethqos->needs_sgmii_loopback = data->needs_sgmii_loopback;
+ ret = qcom_ethqos_init_noc_clks(ethqos, data);
+ if (ret)
+ return ret;
+
ethqos->link_clk = devm_clk_get(dev, data->link_clk_name ?: "rgmii");
if (IS_ERR(ethqos->link_clk))
return dev_err_probe(dev, PTR_ERR(ethqos->link_clk),
--
2.34.1
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