[PATCH v2] PCI: rockchip: Skip the Tpvperl wait when power is already valid

[Igor Velkov]

On Wed, 14 Oct 2026 12:57:47 +0530, Manivannan Sadhasivam wrote:
> I do agree that the Tpvperl delay is *redundant* if the supplies are already
> enabled by the bootloader. But I do not agree that it causes the Endpoint to not
> respond.

A data point from a Kobol Helios64 (RK3399, JMB585 on pcie0, ep-gpios as in
the mainline DTS):

- Enumeration at boot works with and without this patch.
- Resume from s2idle fails in rockchip_pcie_resume_noirq. On plain v7.3-rc7
  with the mainline DTB, 13 cycles pass and the 14th fails with "PCIe link
  training gen1 timeout"; resume_noirq returns -110 and the board resets.
  On an Armbian kernel with this patch (all supplies stay enabled across
  suspend, so the wait is skipped on resume too) the first resume ends in a
  synchronous external abort in rockchip_pcie_rd_conf from pci_power_up.
- Plain v7.3-rc7 also hit an asynchronous SError during the bus scan at probe
  in 1 of 4 boots.

So on this board the resume failure does not depend on the Tpvperl wait.

Igor