[PATCH 0/2] irqchip/gic-v5: Fix standalone IRSes OF driver probe and DT bindings

[Sascha Bischoff]

On 15/10/2026 09:20, Lorenzo Pieralisi wrote:
> The GICv5 architecture allows IRSes to be designed as standalone, ie with
> no CPU connection, to support system topologies where the IRS is separated
> from CPUs.
> 
> Current OF code fails the IRS probe if "cpus" and "arm,iaffids" properties,
> that define IRS<->CPU connections, are missing (which goes against the
> current schema because they are "required"), which is not correct for
> the aforementioned reasons.
> 
> DT schema for GICv5 must be updated in that "cpus" and "arm,iaffids"
> properties are currently defined as "required" which is not correct
> (unless there is a way to keep them "required" and empty) and must
> be relaxed.
> 
> I do not think it is possible to keep "cpus" and "arm,iaffids" as
> "required" and allow them to be empty lists - I would need DT
> maintainers feedback on that to see what is best.
> 
> I did not mark patches for stable kernels because I would like to get
> feedback on the DT binding changes first before sending any change that
> is potentially ABI changing back to stable kernels (strictly speaking
> I do not think the DT changes can actually break anything - the only
> potential issue is DT files that do declare "cpus" and "arm,iaffids" as
> empty list against the schema - if they do that they are already broken
> and this patchset changes nothing in that respect).
> 
> Signed-off-by: Lorenzo Pieralisi <lpieralisi at kernel.org>

Thanks for fixing this issue, Lorenzo. It would be a shame if we 
couldn't describe all possible topologies!

These changes look good to me:

Reviewed-by: Sascha Bischoff <sascha.bischoff at arm.com>

Thanks,
Sascha

> ---
> Lorenzo Pieralisi (2):
>        dt-bindings: interrupt-controller: gicv5: Relax IRS properties constraints
>        irqchip/gic-v5: Fix standalone IRSes OF probe
> 
>   .../devicetree/bindings/interrupt-controller/arm,gic-v5.yaml     | 9 ++++++---
>   drivers/irqchip/irq-gic-v5-irs.c                                 | 4 ++++
>   2 files changed, 10 insertions(+), 3 deletions(-)
> ---
> base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
> change-id: 20261014-gicv5-irs-no-cpus-8c5fba3f9940
> 
> Best regards,
> --
> Lorenzo Pieralisi <lpieralisi at kernel.org>