[PATCH v2 05/24] dt-bindings: reset: Add ZTE ZX279128S reset controller bindings
Krzysztof Kozlowski
krzk at kernel.org
Thu Oct 15 02:27:12 PDT 2026
On Wed, Oct 14, 2026 at 08:20:45AM +0100, Navid Ghahremani wrote:
> Define logical reset indices (0, 1, 2...) for the topcrm and crm2
> reset controllers on ZTE ZX279128S SoCs.
>
> Signed-off-by: Navid Ghahremani <ghahramani.navid at gmail.com>
> ---
> .../dt-bindings/reset/zte,zx279128s-reset.h | 26 +++++++++++++++++++
This belongs to the patch with bindings/schema.
> 1 file changed, 26 insertions(+)
> create mode 100644 include/dt-bindings/reset/zte,zx279128s-reset.h
>
> diff --git a/include/dt-bindings/reset/zte,zx279128s-reset.h b/include/dt-bindings/reset/zte,zx279128s-reset.h
> new file mode 100644
> index 0000000000..5b580bcda8
> --- /dev/null
> +++ b/include/dt-bindings/reset/zte,zx279128s-reset.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (C) 2026 Navid Ghahremani <ghahramani.navid at gmail.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_ZTE_ZX279128S_RESET_H
> +#define _DT_BINDINGS_RESET_ZTE_ZX279128S_RESET_H
> +
> +/*
> + * Top CRM logical reset lines. Mapped by drivers/clk/zte/clk-zx279128s.c
> + * to hardware register offsets and bit shifts.
> + */
> +#define ZX279128S_RESET_USB_B9 0
> +#define ZX279128S_RESET_USB_B10 1
> +#define ZX279128S_RESET_USB_B11 2
> +#define ZX279128S_RESET_USB_B14 3
> +#define ZX279128S_RESET_COUNT 4
Drop, not a binding.
> +
> +/*
> + * Top CRM 2 logical reset lines.
> + */
> +#define ZX279128S_CRM2_RESET_PCIE0 0
> +#define ZX279128S_CRM2_RESET_PCIE1 1
> +#define ZX279128S_CRM2_RESET_COUNT 2
Drop.
Best regards,
Krzysztof
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