[PATCH RFC 0/5] BCMBCA PMB reset controller

[William Zhang]

Hi Linus,


On Wed, Oct 14, 2026 at 2:48 AM Linus Walleij <linusw at kernel.org> wrote:
>
> This is another of these big upfront design binding and driver
> hoards that is the consequence of adding new SoC support. My stake
> is to be able to boot and test a full featured Cortex-A5 system and
> the BCM6846 XG6846B is one such system on my desk.
>
> It's been cooking for a while in various prototype forms.
>
> IMPLEMENTATION:
>
> Add a shared Processor Monitor Bus (PMB) driver and a child reset
> provider for Broadcom BCMBCA blocks. Support BCM6846 XRDP and its Runner
> cores, PCIe0/1 and PVTMON. The PMB bus driver uses the third generation
> Platform Management Controller (PMC3) keyhole interface. It owns the
Power Management Controller

> register bank and serializes complete sequences for child services.
>
> The fixed SoC transport is built-in and has no sysfs bind/unbind
> controls, allowing delayed recovery to retain hardware ownership
> until a busy transaction completes. The reset child can be modular.
>
> The series contains three bindings, the PMB bus driver, and the PMB reset
> driver. Describe PMC 3.1 as a simple-mfd with two system-controller
> children and a bus child, each owning its register window.
>
> The bus child exposes the PMB transport and contains the reset provider.
> The parent uses Broadcom's "brcm,bca-pmc-3-1" compatible. The PMB and
> reset drivers support only the BCM6846-specific compatibles for now.
> Other BCMBCA SoCs have different reset groups or PMB interfaces.
>
> Use one reset specifier cell and define BCM6846_RESET_XRDP as ID 0 for
> XRDP and its three Runner cores. The vendor sources describe individual
> PMB device addresses and reset masks, but no ID for this combined group.
> SoC tables map IDs to blocks, register values, timing and sequence
> callbacks. PCIe pulses preserve lane-selection straps. PVTMON uses its
> analog-acquisition reset. Consumers must quiesce every affected user;
> these resets do not replace clock, power-domain, PHY or UBUS setup.
> Power-cycle operations for USB2, WAN, PERIPH, MEMC, BIU and BIU PLL are
> left to power-domain and platform power-management support.
>
> This series is based on v7.3-rc1 and is a prerequisite for the
> forthcoming Genexis XG6846B Ethernet support series, which works.
>
> The BCM6846 XRDP reset sequence enabled full-MTU traffic on all four LAN
> ports and copper WAN and has been tested on that series.
>
> MISSING:
>
> I did not add MAINTAINERS entries because I don't know how the Broadcom
> maintainers feel about it. Tell me.
>
I don't mind and please add yourself as the maintainer.

> MERGE STRATEGY:
>
> I'm not sure. Possibly through SoC with ACKs. Through an MFD immutable
> branch if Lee wants to handle it.
>
> Assisted-by: LLM
> Signed-off-by: Linus Walleij <linusw at kernel.org>
> ---
> Linus Walleij (5):
>       dt-bindings: mfd: Describe the BCM6846 PMC complex
>       dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus
>       dt-bindings: reset: Describe the BCMBCA PMB reset controller
>       bus: Add a shared BCMBCA PMC3 PMB transport
>       reset: Add BCMBCA block resets through the PMB
>
>  .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml  |  98 +++++++
>  .../bindings/reset/brcm,bcm6846-pmb-reset.yaml     |  46 ++++
>  .../bindings/soc/bcm/brcm,bcm6846-pmb.yaml         |  51 ++++
>  drivers/bus/Kconfig                                |  13 +
>  drivers/bus/Makefile                               |   1 +
>  drivers/bus/bcmbca_pmc3_pmb.c                      | 232 +++++++++++++++++
>  drivers/reset/Kconfig                              |  15 ++
>  drivers/reset/Makefile                             |   1 +
>  drivers/reset/reset-bcmbca-pmb.c                   | 281 +++++++++++++++++++++
>  include/dt-bindings/reset/brcm,bcm6846-pmb.h       |  15 ++
>  include/linux/soc/bcm/bcmbca-pmb.h                 |  25 ++
>  11 files changed, 778 insertions(+)
> ---
> base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
> change-id: 20261013-xg6846b-bcmbca-xrdp-reset-de71b80c25a4
>
> Best regards,
> --
> Linus Walleij <linusw at kernel.org>
>
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