[PATCH 20/24] spi: Add ZTE ZX279128S SPI flash controller

[Navid Ghahremani]

Hi Stefan,

Thank you for pointing me to your spi-zx.c driver and for the detailed
explanation of the PIO vs IRQ vs DMA trade-offs!

I tested your driver directly on the ZTE ZXHN H3600 (ZX279128S) hardware
running Linux 6.18.55, and it works flawlessly in PIO mode:

  zx-qspi 94406000.spi: ZX QSPI Controller driver initializing
  zx-qspi 94406000.spi: Cannot get RX DMA, using PIO
  zx-qspi 94406000.spi: Cannot get TX DMA, using PIO
  spi-nand spi0.0: HeYangTek SPI NAND was found.
  spi-nand spi0.0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64
  10 fixed-partitions partitions found on MTD device spi0.0
  UBIFS (ubi0:1): UBIFS: mounted UBI device 0, volume 1, name "rootfs_data"

MTD partitioning, UBI attachment, and UBIFS read/write operations all
completed cleanly with zero transfer errors or ECC faults.

To ensure the driver works seamlessly across both the ZX29 (100 MHz bus)
and ZX279128S (125 MHz bus), I updated the clock divider calculation to
dynamically query the controller clock rate via clk_get_rate(spifc->clk)
rather than assuming a fixed input frequency.

In v2, I have replaced my separate SPI driver with your unified spi-zx.c
under drivers/spi/spi-zx.c, and updated the DT binding schema to describe
both "zte,zx297520-spifc" and "zte,zx279128s-spifc".

All other items you raised (splitting CRM DT schemas, simple-mfd reboot
child, logical reset enum IDs, synchronizing clock/reset locking, and
isolating the PCIe SerDes into a Generic PHY driver) are also
implemented and verified in v2.

Thank you again for your collaboration and support.

Best regards,
Navid