[PATCH 0/3] Add VGA support for Apalis iMX6

[Laurent Pinchart]

Hi Francesco,

On Tue, Oct 13, 2026 at 11:06:31AM +0200, Francesco Dolcini wrote:
> On Mon, Oct 12, 2026 at 06:40:54PM +0200, Laurent Pinchart wrote:
> > On Mon, Oct 12, 2026 at 04:25:22AM -0300, Leonardo Costa wrote:
> > > This series adds a device tree overlay that enables the VGA output on Apalis
> > > iMX6, which is driven from a parallel RGB interface passing through a
> > > non-programmable video DAC.
> > > 
> > > The video DAC is a simple resistor network gated by an active-low
> > > data-enable signal. For the bridge to work properly, this series also
> > > changes the following in the dt-bindings and simple-bridge driver:
> > > 
> > > - dt-bindings: Add a new compatible for the bridge in the simple-bridge
> > >   binding. This is necessary because the existing dumb-vga-dac compatible
> > >   doesn't describe a data-enable signal polarity.
> > > 
> > > - simple-bridge: Add the VGA bridge match-table entry and timings
> > >   struct, setting the DRM_BUS_FLAG_DE_LOW flag for the bridge.
> > 
> > Is there schematics available anywhere ? That would help reviewing the
> > series ?
> 
> This circuit is on the SoM, and the SoM schematics are
> confidential and not generally available.
> 
> I tried to extract as ascii art the relevant circuit, hope it helps

Thank you, it makes things clearer.

The circuit seems fairly generic. Wouldn't it be better to add an
optional property ot the dumb-vga-dac instead of a new compatible string
specific to Apalis ?

> BLUE (5 bits)
> =============
> DISP0_DATA[4] ---[R30   348R]---+
> DISP0_DATA[3] ---[R33   715R]---+
> DISP0_DATA[2] ---[R36  1.47K]---+-------- VGA1_B
> DISP0_DATA[1] ---[R39  2.94K]---+          |
> DISP0_DATA[0] ---[R42  5.90K]---+          D
>                                            |
> DI0_PIN15 ------------------------------ G | T4 MMBF2201N
>                                            S
>                                            |
>                                           GND
> 
> 
> RED (5 bits)
> ============
> DISP0_DATA[15] --[R31   348R]---+
> DISP0_DATA[14] --[R34   715R]---+
> DISP0_DATA[13] --[R37  1.47K]---+-------- VGA1_R
> DISP0_DATA[12] --[R40  2.94K]---+          |
> DISP0_DATA[11] --[R43  5.90K]---+          D
>                                            |
> DI0_PIN15 ------------------------------ G | T5 MMBF2201N
>                                            S
>                                            |
>                                           GND
> 
> 
> GREEN (6 bits)
> ==============
> DISP0_DATA[10] --[R32   348R]---+
> DISP0_DATA[9]  --[R35   715R]---+
> DISP0_DATA[8]  --[R38  1.47K]---+
> DISP0_DATA[7]  --[R41  2.94K]---+-------- VGA1_G
> DISP0_DATA[6]  --[R44  5.90K]---+          |
> DISP0_DATA[5]  --[R45  11.8K]---+          D
>                                            |
> DI0_PIN15 ------------------------------ G | T6 MMBF2201N
>                                            S
>                                            |
>                                           GND

-- 
Regards,

Laurent Pinchart